轉職熱搜工作

MTK電源管理部門設計設計電源管理IC及電源管理單元以滿足各式各樣智慧手機, IOT, 車用, 以及ASIC的需求. 職缺包含: 1. DC-DC 轉換器 2. 線性電壓調節器 3. 切換電壓調節器

聯發科技以先進多媒體技術聞名，數位視訊解碼更為多媒體技術中之重要一環，如果您對Multi-format Video decoder架構設計 / RTL implementation / 整合驗證有興趣，聯發科技誠摯邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

1. 電源管理晶片架構與系統設計(手機/車用) 2. 低功耗設計技術開發 3. 混合訊號數位 IP 設計: voltage regulator, ADC, system clocking and start-up, TOP infra/bus, peripheral designs 4. 電源管理晶片整合: front-end and back-end integration

1. Develop and implement DRAM controller/PHY solutions for data-center applications. Validate functionality, improve design to optimize performance, power, latency and efficiency. 2. Memory controller/PHY Integration: Design and integration memory system.

1. 優化數位 IC 設計 BE 流程與方法 2. 執行與管理數位 IC 設計 BE 相關任務 (2.a) Physical aware synthesis, DFT-SCAN, DFT-MBIST insertion (2.b) STA timing analysis 與 fixing (2.c) Netlist level QC，例如 CLP 3. 與 FE RTL designer 及 PD APR 團隊密切合作，針對 PPA（Performance, Power, Area）進行 design 及 clock structure 的優化 4. 將依應徵者的年資與專業經驗，提供不同的職級

1. 參與無線通訊系統（如 WiFi or Modem baseband）之數位電路設計、開發及驗證 2. 負責數位通訊模組設計、RTL coding、模擬、整合、除錯、功能驗證及效能優化 3. 與系統、演算法、實體設計等跨部門團隊合作，確保整體設計達成規格、效能與時程目標 4. 參與設計問題分析與除錯，持續優化功耗、效能與面積（PPA）

1. Serdes/High speed interface related PHYD IP architecture planning. 2. Serdes/High speed interface related PHYD IP RTL coding. 3. Serdes/High speed interface related PHYD IP front-end and back-end integration. 4. Co-work with MAC design team and DV team for IP verification. 5. Co-work with Analog design team for PHY co-simulation.

1. Serdes PMA IP architecture planning 2. Serdes PMA IP RTL coding 3. Serdes PMA IP front-end and back-end integration 4. Co-work with PCS and MAC design team and DV team for IP verification 5. Co-work with Analog design team for PHY co-simulation 6. Co-work with Algorithm team for algorithm implementation and bit-true verification

1. Architecture design and RTL implementation of Automotive/Smartphone chipset 2. SoC system power and performance analysis 3. SoC system bus and memory subsystem design, integration, and modeling 4. SoC low power design, integration, and modeling 5. SoC functional safety analysis, design, integration, and modeling 6. SoC cyber security analysis, design, integration, and modeling

1. 旗艦智慧型手機晶片整合 2. 車用系統晶片整合 3. Clock架構 4. Timing收斂與分析 5. DFT/Test mode整合驗證