轉職熱搜工作

1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project

1. Develop systematic algorithms to alleviate design challenges, including implementation, process what-if assessment, system performance evaluation, in advanced nodes or package 2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies 3. Explore new EDA features and define improvement direction from MTK product requirements

CPU Physical design, - floorplanning, - timing closure - Physical verficiation - DFT

Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

1. Develop 3.5D methodology from RTL to GDS and Package 2. Coordinate Thermal and PI/SI team to deal with high power design 3. Execute the project at different phases

1. Perform pre-silicon and post-silicon correlation and modeling related to adaptive voltage scaling and on-die sensor 2. Develop and improve post-silicon testing methodologies related to adaptive voltage scaling and on-die sensor

1. Model development (includes behavior modeling/ cycle approximate modeling/ power modeling) 2. ESL platform and simulation technology development. 3. Next-generation processor architecure prototyping and design exploration 4. Next-generation modem platform architecure prototyping and design exploration

-規劃並執行高速介面（如 PCIe, USB, DP, UFS, CSI, UCIe）IP PHY 驗證。 -建立並維護測試平台，進行 System 與 Electrical 測試。 -使用 Scope, BERT, LA, Signal Analyzer 等儀器進行 Signal Integrity 與 Compliance Test。 -分析測試結果，協助 DE 及 SW 團隊解決問題。 -設計並開發硬體 PCB 評估板，支援系統驗證。

解讀客戶的網絡安全需求 從網絡安全需求中推導出功能和安全概念 制定和審查安全系統架構 與 IP 團隊和客戶溝通和協調安全設計 執行系統安全分析（例如：TARA）