轉職熱搜工作

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

1. 屬於DE部門 2. 支援 WiFi/BT, 手機與 ARM computing等產品晶片開發計畫的FPGA與Emulation驗證工作與驗證技術開發 3. 主要為獨立貢獻者； 長期可依照潛力培養團隊領導能力，並有機會與全球科技產品的領導廠商有直接溝通合作的機會，可藉此培養個人與跨國的領導企業一起合作技術開發的能力。 4. 工作目標如下: a) 支援計畫功能與系統驗證與除錯 b) 規劃及協調驗證資源、項目及時程 c) 改善和加速multi-FPGA與Emulator工作流程 d) 增進FPGA與Emulator驗證效能 e) 研發SoC系統電路分析工具

1. Responsible for high-speed UCIE development, including architecture definition, verification, and customer support (familiar with architecture, firmware, debugging, optimization, and testing tasks). 2. Define architecture and specifications through simulations. ( Matlab ) 3. Develop test automation. 4. Collaborate with the team to establish system prototypes and optimize performance. 5. Achieve product integration for clients and support mass production.

1. Model development (includes behavior modeling/ cycle approximate modeling/ power modeling) 2. ESL platform and simulation technology development. 3. Next-generation processor architecure prototyping and design exploration 4. Next-generation modem platform architecure prototyping and design exploration

We are seeking skilled engineers for designing high-performance Virtualization and Interconnect Architecture and developing RTL for both Automotive and High-Performance Computing. Roles: 1. Develop, assess, and refine RTL to achieve performance, power, area, and timing goals. 2. Develop micro-architecture by exploring early high-level macro architectures, researching micro-architecture, and defining detailed specifications. 3. Coordinate co-design efforts between architecture, software, and hardware teams to achieve functional realization. 4. Develop and implement interconnect methodologies, such as simulation, emulation, implementation, and efficiency improvement.

(請留意：為加快面試安排時間，2026校招僅限定投遞5個職缺)我們在找這樣的你： 資工/資管/電子/電機/電信/通訊/電控相關研究所背景，對行動通訊、無線及寛頻連結、家庭娛樂晶片解決方案有濃厚興趣的2026年應屆畢業生。 勇於表達意見，以團隊成功為目標，面對困難不輕易放棄，總是在想更好的做法，擁有創新及不斷學習的精神。 聯發科技邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

Wi-Fi架構和數位電路設計 整個晶片的時鐘、測試和重置規劃 低功耗數位設計 從RTL到閘級的SoC晶片整合，包括時序收斂和可測試性 設計方法和整合流程改進

1.Digital design (RTL design, Synthesis, integration, verification) 2.SoC Chip design, integration 3.Familiar with VLSI design flow is a plus

Wi-Fi架構和數位電路設計 整個晶片的時鐘、測試和重置規劃 低功耗數位設計 從RTL到閘級的SoC晶片整合，包括時序收斂和可測試性 設計方法和整合流程改進

1. Architecture design and RTL implementation for Smartphone and automotive chip 2. Smartphone SoC and mobile computing platform design. 3. System bus and high speed interface designs