轉職熱搜工作

1. Model development (includes behavior modeling/ cycle approximate modeling/ power modeling) 2. ESL platform and simulation technology development. 3. Next-generation processor architecure prototyping and design exploration 4. Next-generation modem platform architecure prototyping and design exploration

We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.

-規劃並執行高速介面（如 PCIe, USB, DP, UFS, CSI, UCIe）IP PHY 驗證。 -建立並維護測試平台，進行 System 與 Electrical 測試。 -使用 Scope, BERT, LA, Signal Analyzer 等儀器進行 Signal Integrity 與 Compliance Test。 -分析測試結果，協助 DE 及 SW 團隊解決問題。 -設計並開發硬體 PCB 評估板，支援系統驗證。

解讀客戶的網絡安全需求 從網絡安全需求中推導出功能和安全概念 制定和審查安全系統架構 與 IP 團隊和客戶溝通和協調安全設計 執行系統安全分析（例如：TARA）

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory. Furthermore, through collaboration with worldwide colleagues, you will have the rare opportunity to apply advanced Deep Learning theories to novel application areas such as AI-designed IC and General Intelligence Conversation. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory, to obtain insights beyond mythical theories as well as to apply the right solution to novel application areas such as AI-designed IC and General Intelligence Conversation. Furthermore, you shall actively engage with worldwide colleagues and academics to nurture and build a collaborative and effective R&D environment. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

(請留意：為加快面試安排時間，僅限定投遞5個職缺)我們在找這樣的你：對行動通訊、無線及寛頻連結、家庭娛樂晶片解決方案有濃厚興趣；勇於表達意見，以團隊成功為目標，面對困難不輕易放棄，總是在想更好的做法，擁有創新及不斷學習的精神。聯發科技邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

1. Develop high speed interface subsystem architecture and integrate PCIe, MIPI, or DisplayPort subsystem. 2. Develop security and FuSa function on PCIe, MIPI, or DisplayPor degital circuit.

* Define and optimize SOC hardware architecture and associated software flows in aspects of system performance/power/area to improve MediaTek‘s product competitiveness. * Develop simulation and analysis platforms for performance/power/area analysis. * Work Loction : HsinChu, Taipei