轉職熱搜工作

1. Package model behavior exploration for warpage and crack by using Ansys mechanical simulation. 2. amelioration by using Ansys optimization algorithm. 3. Thermal dissipation for CFD and coupling-dimensional domains simulation for Joule heat or electromigration / electrophoresis pathfinding. 4. PCB / Substrate / Package physical modeling and simulation optimization for reliability quality.

1. 大型連線自動化設備機構方案規劃和技術指導； 2. 點膠雷射&貼膜組立等自動化設備機構方案評估及結構設計； 3.點膠雷射及貼膜組立等設備的核心工藝實驗，驗證，及可行性報告產出； 4. 現場設備的調試優化改善及異常處理 5.機構標準化文件的制定與發行 *須配合職務需求出差派駐

1.執行NB特案機種的系統熱傳與噪音工程設計 2.建構TPE & VN團隊與人員培訓 3.建構TPE & VN熱傳與噪音設計實驗室

1.執行NB特案機種的系統熱傳與噪音工程設計 2.建構TPE & VN團隊與人員培訓 3.建構TPE & VN熱傳與噪音設計實驗室

1.主導掌握客戶重點工程需求與資訊來源 2.主導手機機構件結構開發， 評估各階段結構及製程DFM，包含機表，化表製程，並推動客戶承認 3.整理並分析各個開發階段FAI, CPK等尺寸報告，並提出優化方案 4.失效分析(FACA)，參與客戶MIL 5.結構、製程及規格DOE的方案設計、驗證跟進和結果分析 *需長期出差

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16521&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. We are seeking a highly motivated and talented R&D Engineer to join our team in developing advanced IC packaging technologies. This position offers an exciting opportunity to work on cutting-edge solutions, such as CoWoS (Chip-on-Wafer-on-Substrate), Fan-Out Wafer Level Packaging (FOWLP), and 3DIC (Three-Dimensional Integrated Circuits). The ideal candidate will have strong technical expertise and a passion for innovation in semiconductor packaging design and analysis. Join us in shaping the future of advanced IC packaging technologies and contributing to groundbreaking innovations in the semiconductor industry. This role provides a unique opportunity to work in a dynamic environment, solve challenging engineering problems, and make a meaningful impact on next-generation packaging solutions. Responsibilities: 1. Conduct risk assessments and provide mitigation plans for IC packages through simulation and experiment, interpreting experimental data and simulation to provide insights into material selection and design improvements. 2. Practice FEM and DOE in problem solving and path finding particularly on packaging. Conduct mechanical or thermal simulations using finite element analysis (FEA) techniques to evaluate and optimize packaging performance, and analyze stress, deformation, and heat dissipation characteristics to ensure reliability and efficiency of packaging designs. 3. Continuously improve simulation methodology, refine material modeling, and enhance script automation capabilities.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=4672&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Define advanced testing hardware technology architecture. 2. Create world-class method and role model tech structured problem solving. 3. Conduct advanced electrical/mechanical/thermal analysis and PI/SI improvement. 4. Be a focal contact between customer and tsmc testing for test validation and release to production. 5. Exhibit good and open communication skills, be able to work within cross-functional teams.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=451&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Advanced 2.5D and 3D packaging technology development. 2. Design flows, including APR, EM/IR, Thermal, and SI/PI, enablement. 3. Design kits generation and QA. 4. 3DIC solution adoption support with key customers.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=550&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: Apply advanced computational models to predict performance, optimize structure and doping profile, and provide improvement directions in nano-scaled device technologies. Develop and apply finite element method (FEM) modelling, including but not limited to stress simulations, computational fluid-dynamics, thermal conductivity simulations and electromagnetic wave simulations, for both macroscopic (tool/wafer) and microscopic (discrete device) structures.