轉職熱搜工作

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=15353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Packaging‘s mission is to provide the best heterogeneous integration technology (HIT) that realizes system expansion and performance improvement, and to influence the development of the industrial ecosystem by achieving innovation together with our partners as the leading advanced packaging solution provider. Responsibilities: Act as first line guardian of TSMC world class chip manufacturing process. Ensure the stable quality of wafers output by monitoring and adjusting process parameters to enhance machine efficiency. 1. Develop and maintain baselines, including setting up recipes. (1) Improve the stability and accuracy of metrology recipes to enhance yield and reliability qualifications. (2) Responsible for transferring metrology solutions to volume manufacturing. 2. Employ cutting-edge technology to 3DIC metrology, including SoIC, CoWoS, InFO, and Panel. (1) Leverage your analytical abilities to improve metrology performance, guaranteeing high yield and device efficiency. (2) Identify challenges, formulate methodologies, propose solutions, and new metrology evaluation plans. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.

1.智慧型手機系統開發,生產及驗證 2.FPGA 系統開發,生產及驗證 3.產出平台使用手冊 4.處理內外客戶的技術問題，視情形需要現場支持

1)建立系統級熱模型，並設計具市場競爭力的散熱解決方案。​ 2)參與制定、分析、評測SOC TDP(Thermal Design Power)​ 3) 設計、設置、執行並交付各種thermal和TDP實驗的結果，驗證SOC 和系統硬體性能。​ 4) 支援技術專案，並與其他內部組織和客戶合作，支援開發週期中的執行過程。​ 5) 執行熱模擬和驗證，並與合作單位展示和溝通成果。

1. 企業/家用WIFI AP路由器 開發經驗者尤佳 2. 高速介面應用, 驗證及除錯 e.g. USB, PCIe, xGMII, Ethernet, DDR 3. 802.11 a/b/g/n/ac/ax/be WiFi SoC及Ethernet SoC驗證, 公板設計及驗證 4. Power/Thermal/EMI 防治對策 5. 支持客戶應用及量產導入 6. 熟悉HW設計的TOOL 如OrCAD, PADS, Allegro

1. 熟悉 2.5D 或是 3D 封裝技術, 開發和量產經驗 2. 從系統架構優劣比較, SIPI 或是測試或是 thermal 角度來提供適合的封裝技術

先進封裝技術開發 1. 先進新產品導入技術開發 (新產片試產規劃, DRC/DRM檢驗, DOE及良率改善規劃, 量產區間及良率分析) 2. 熟悉先進chiplet及3DIC封裝技術開發 3. 晶圓級與面板級先進封裝結構設計

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

Develop advanced package technologies for MediaTek‘s HPC business

1. Develop 3.5D methodology from RTL to GDS and Package 2. Coordinate Thermal and PI/SI team to deal with high power design 3. Execute the project at different phases