轉職熱搜工作
您正在找熱傳工程師的工作,共計261筆職缺在等你,馬上去應徵吧!
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常駐越南-熱處理機台人員
月薪 50000元 東南亞越南 0~1年工作經驗1. 會熱處理爐進收料作業操作者 2. 需有操作鹽浴爐經驗者 3. 機械操作維護,負責生產過程與確保產品品質 4.主管交辦事項 5.有宿舍展開 -
Senior Cloud System Debug Engineer
面議(經常性薪資達4萬元或以上) 40000元 新北市土城區 工作經歷不拘We are seeking an experienced system debug engineer with strong background in the cloud/datacenter domain. In this position, you will play a key role in realizing vision to work closely with Foxconn’s biggest customers: CSPs to enable and scale out Foxconn latest server platforms and technologies. This position will have a chance to touch cutting-edge silicon, server hardware technologies and emerging firmware and OS solutions, and apply them to the CSPs. Responsibilities include: • Mastering the latest Intel/AMD/Ampere hardware and platform features. Tracking the enabling status of those features in silicon, low-level firmware/software, Operating System and latest Linux Upstream Kernel. • Debug customer data-center issues related to platform enabling and customization. Deep dive and root cause silicon enabling and system integration issues to sub system or source code level. • Closely collaborate with silicon enabling, firmware development, and various component teams from third-party vendors (e.g., memory, storage, network, power and performance, thermal/mechanical, I/O, etc.) to troubleshoot and debug cross-discipline and complex integration issues on server platforms. Drive debug taskforce cross functions to ensure timely issue resolution. • Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes • Contribute to validation team on improving test plan/method to validate features and verify fixes • Put new technology into practice in the fastest manner, explore all possible alternatives for better solution, and pursue constant improvement on debug methodology and tool • Define and drive the system debug process implementation and ingredient owner engagement and alignment Qualifications: The candidate should possess a Bachelor of Science in Electrical Engineering, Computer Science or relevant technology (advanced degree is preferred) with 5+ years of applicable industrial experience in the following: • Solid understanding of x86/IA with design experience or working knowledge on CPU, DIMM, Chipset and Platform • Strong low-level debugging skills that enable the root causing of issues across hardware, firmware and OS levels • Experience with ASSET SCANWORKS, Intel ITP and Cscript development. Experience with PythonSV or programming with Python. In-depth knowledge of CPU flows and experience on silicon level debug and ASD (e.g. CrashDump Analysis) are preferred • Solid understanding and hands-on development/validation experience of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc. • Understanding of Operating System, Driver, BIOS and firmware fundamentals. Programming skills (e.g. C/C++) that enable the source code level debug and issue fix is highly preferred. • Experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues; • Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders.展開 -
台灣電池中心- 電芯機構設計員(高雄) 2025P002
面議(經常性薪資達4萬元或以上) 40000元 高雄市大寮區 2~3年工作經驗1.電芯機構設計與結構評估 2.樣品製作、測試、分析、改善 3.執行主管交辦事項 -
PB0109 熱流Thermal 工程師(內湖)
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 工作經歷不拘1.針對NB/PC產品進行前期熱模組細部設計與評估 2.NB熱模組測試規劃,提供實驗數據結果 3.進行issue debug以確保產品品質 4.執行研發階段驗證產品功能,以確保產品功能之完整性 ※依學經歷、工作年資敘薪展開 -
PB0108 熱流Thermal 設計主任/設計經理(內湖)
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 5~6年工作經驗1. 技術專業貢獻 • 高階設計與研發:負責設計和開發高難度或關鍵技術解決方案。 • 問題解決:處理技術上複雜或緊急的問題,提供指導性解決方案。 • 技術創新:推動新技術的採用和創新產品的開發。 ________________________________________ 2. 指導與培訓 • 技術指導:為初級或中級工程師提供技術建議,解答疑問。 • 知識分享:舉辦技術培訓,促進團隊的專業能力提升。 • 項目帶領:在項目中起到技術帶頭作用,指導團隊完成目標。 ________________________________________ 3. 項目參與與管理 • 技術規劃:參與技術方案的制定,確保其可行性和效率。 • 質量控制:審核設計和測試結果,確保技術成果符合質量標準。 • 交付管理:協調技術資源,確保按時完成項目交付。 ________________________________________ 4. 跨部門合作 • 需求分析:與客戶或產品經理溝通,準確理解需求。 • 資源協調:與其他部門協作,確保技術需求與業務目標一致。 • 問題溝通:在項目或技術過程中,解決各部門間的問題。展開 -
3DIC flow engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 3~4年工作經驗【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=451&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Advanced 2.5D and 3D packaging technology development. 2. Design flows, including APR, EM/IR, Thermal, and SI/PI, enablement. 3. Design kits generation and QA. 4. 3DIC solution adoption support with key customers. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
TCAD RD Engineer (Simulation)
面議(經常性薪資達4萬元或以上) 40000元 新竹市 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=550&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: Apply advanced computational models to predict performance, optimize structure and doping profile, and provide improvement directions in nano-scaled device technologies. Develop and apply finite element method (FEM) modelling, including but not limited to stress simulations, computational fluid-dynamics, thermal conductivity simulations and electromagnetic wave simulations, for both macroscopic (tool/wafer) and microscopic (discrete device) structures. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
R&D IIP 3DIC Metrology Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 2~3年工作經驗【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=15353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Packaging‘s mission is to provide the best heterogeneous integration technology (HIT) that realizes system expansion and performance improvement, and to influence the development of the industrial ecosystem by achieving innovation together with our partners as the leading advanced packaging solution provider. Responsibilities: Act as first line guardian of TSMC world class chip manufacturing process. Ensure the stable quality of wafers output by monitoring and adjusting process parameters to enhance machine efficiency. 1. Develop and maintain baselines, including setting up recipes. (1) Improve the stability and accuracy of metrology recipes to enhance yield and reliability qualifications. (2) Responsible for transferring metrology solutions to volume manufacturing. 2. Employ cutting-edge technology to 3DIC metrology, including SoIC, CoWoS, InFO, and Panel. (1) Leverage your analytical abilities to improve metrology performance, guaranteeing high yield and device efficiency. (2) Identify challenges, formulate methodologies, propose solutions, and new metrology evaluation plans. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
R&D IIP Simulation Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16521&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. We are seeking a highly motivated and talented R&D Engineer to join our team in developing advanced IC packaging technologies. This position offers an exciting opportunity to work on cutting-edge solutions, such as CoWoS (Chip-on-Wafer-on-Substrate), Fan-Out Wafer Level Packaging (FOWLP), and 3DIC (Three-Dimensional Integrated Circuits). The ideal candidate will have strong technical expertise and a passion for innovation in semiconductor packaging design and analysis. Join us in shaping the future of advanced IC packaging technologies and contributing to groundbreaking innovations in the semiconductor industry. This role provides a unique opportunity to work in a dynamic environment, solve challenging engineering problems, and make a meaningful impact on next-generation packaging solutions. Responsibilities: 1. Conduct risk assessments and provide mitigation plans for IC packages through simulation and experiment, interpreting experimental data and simulation to provide insights into material selection and design improvements. 2. Practice FEM and DOE in problem solving and path finding particularly on packaging. Conduct mechanical or thermal simulations using finite element analysis (FEA) techniques to evaluate and optimize packaging performance, and analyze stress, deformation, and heat dissipation characteristics to ensure reliability and efficiency of packaging designs. 3. Continuously improve simulation methodology, refine material modeling, and enhance script automation capabilities. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
