轉職熱搜工作

We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.

解讀客戶的網絡安全需求 從網絡安全需求中推導出功能和安全概念 制定和審查安全系統架構 與 IP 團隊和客戶溝通和協調安全設計 執行系統安全分析（例如：TARA）

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory. Furthermore, through collaboration with worldwide colleagues, you will have the rare opportunity to apply advanced Deep Learning theories to novel application areas such as AI-designed IC and General Intelligence Conversation. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory, to obtain insights beyond mythical theories as well as to apply the right solution to novel application areas such as AI-designed IC and General Intelligence Conversation. Furthermore, you shall actively engage with worldwide colleagues and academics to nurture and build a collaborative and effective R&D environment. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

* Lead specific architectural domains for SoC architecture design and product technical feasibility studies (e.g., AI, ISP, heterogeneous computing, memory, interconnect, power, safety, vehicle E/E, in-vehicle network). * Lead or support automotive SoC architecture, focusing on system performance and power based on product requirements. * Lead or support technical feasibility studies of product requirements; collaborate with domain architects and product marketing to develop competitive product design specification. * (If manager) Manage the design architecture team, focusing on both technological advancement and talent development.

We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. Successful DFT architects interact with many external teams and must confidently represent his/her organization. Key Responsibilities • Drive DFT Excellence: Define DFT architecture specifications that enhance ATE and production test environments, optimize test costs, and improve quality across future MTK ASIC product portfolios. • End-to-End DFT Leadership: Manage comprehensive DFT activities spanning architecture definition, design implementation, verification, and test deployment for new product launches • Manufacturing Integration: Serve as a key contributor within MTK’s Global Quality and Operations organization to deliver optimal manufacturing test solutions from early product conception through post-silicon validation • Design Collaboration & Quality Assurance: Partner closely with design teams to ensure accurate implementation of DFT structures and compliance with specifications • Cross-Functional Team Coordination: Lead internal DFT teams in developing and implementing robust test solutions aligned with architectural requirements • Yield Optimization Strategy: Develop comprehensive plans for diagnosability enhancement and systematic yield improvement • Location: Hsinchu, Taipei, Singapore, USA

1. USB4 Controller Development 2. Short term =＞ Improve current design quality of USB4 controller 3. Long term =＞ Next gen USB4 controller architecture define and implementation

1. 分析AI應用業務落地需求，與相關部門和用戶溝通，了解系統需求和功能 2. 分析和解決系統運行中的問題，找出系統瓶頸 (包含模型推理及應用pipeline) 3. 持續改進系統性能，提出優化建議和實施方案 4. 與其他工程部門充分溝通，共同找出可行優化方案

This position involves developing memory architectures, creating circuit implementation techniques and be an interface with CAD team for full verification and model generation. You have opportunity to know how memory design can be implemented into all Mediatek products.

Our team‘s mission is to leverage next-generation technologies to enhance productivity in MediaTek‘s various processes. This technical position requires a combination of knowledge in IC design and expertise in machine learning/generative AI to identify and define opportunities, design feasible and stable solutions, and improve processes to enhance product quality. We are looking for engineers and data scientists who are passionate about introducing new ideas from diverse fields, enjoy working with complex data, uncovering insights, and are eager to tackle challenges. As a key member of a small and versatile team, you will provide the most appropriate solutions through rapid iterations. In terms of soft skills, you need to have a proactive attitude, an open and continuously adaptive learning ability, excellent verbal and written communication skills, and the ability to collaborate across teams. In terms of hard skills, you need to have strong programming abilities, sufficient knowledge 我們團隊的使命是利用下一代技術，協助MediaTek在各研發流程中提升生產力。此職缺為技術職，需結合IC設計領域知識與機器學習技術/生成式AI，識別並定義機會點，設計可行且穩定的解決方案，以改善研發流程並提升產品品質。 我們正在尋找熱衷於從多元領域引入新想法的工程師及數據科學家，喜歡處理複雜數據、發現洞見，並樂於挑戰困難。作為一個小而多才多藝的團隊關鍵成員，你將以快速迭代的方式提供最適當的解決方案。 在軟技能方面，你需要具備主動積極的心態、開放且持續調整的學習能力、良好的口頭與書面溝通技巧，以及跨團隊協作的能力。硬技能方面，你需要有良好的程式撰寫能力，對機器學習有足夠認知，能與團隊成員合作，並有機會與全球的合作單位有效展開協作。