轉職熱搜工作

解讀客戶的網絡安全需求 從網絡安全需求中推導出功能和安全概念 制定和審查安全系統架構 與 IP 團隊和客戶溝通和協調安全設計 執行系統安全分析（例如：TARA）

1. Interpret customers’ functional safety requirements into SoC requirements 2. Define the SoC level architectures to meet functional safety requirements 3. Communicate and coordinate safety designs with cross-function IP teams 4. Perform system safety analysis (ex: FMEDA)

1. Create power models and simulate software design for power optimization to achieve world-class low power consumption. 2. Design software throttling mechanisms and corresponding software/hardware 3. Collaborate with IP, SoC, and software teams to analyze system power consumption, with a focus on automotive scenarios, and drive the evolution of SoC low power hardware and software architecture. 4. Evaluate different architecture and IP options during product specification definition, analyze system power experience, and generate power dashboards to support product decision-making. 5.Conduct or assist in power measurement and calibration against power model estimations; analyze PMIC/Power rail design, SoC power states, and data-path power, and propose SoC design optimization solutions. 6. Understand related requirements and propose system power management framework. Elaborate power on sequence for key scenario in early stage for new projects.

The Senior Power Integrity Engineer is responsible for the design and analysis of Power Delivery Networks (PDNs), encompassing voltage regulators, PCBs, substrates, and silicon dies, to drive strategic technology development for data center SoCs. Key responsibilities include conducting power integrity pathfinding, developing both detailed and reduced-order PDN models, and optimizing PDN performance through comprehensive time-domain and frequency-domain analysis. This role requires proficiency in scripting and design automation, as well as expertise in analytical methods and commercial simulation tools (e.g., 2.5D EM solvers) to extract PCB and package impedance profiles and generate accurate N-port models.

1. Develop and implement tailored DRAM controller/PHY solutions for automotive applications. Validate functionality, improve design revisions and meet performance targets as well as system requirements. 2. Perform rigorous design testing and debugging in automotive environments. Troubleshoot and propose solutions for any issues occurring in post-silicon validation. 3. System Level Cache Design & Implementation: Design and implement system level cache strategies to optimize performance and efficiency across our product range. 4. System-Level Understanding: Exhibit a system-level understanding of performance trade-offs, system architecture, memory subsystems, and various memory technologies (DDR3, DDR4, DDR5, LPDDR3, LPDDR4, LPDDR5 etc.). 5 . Ensure that all designs comply with automotive industry standards and regulations, such as ISO 26262 and Automotive SPICE.

1. Smartphone (Low Power Architect) and Automotive (Power control) 2. Not a management position 3. Short term:digital IP design/integration of power control IPs with zero bugs Long term:define power control arch for smartphone or automotive products develop new tech for power control

1. 整合IR 資訊和內部團隊合作解決 IR 問題 2. 產生並分析 power 資訊 3. 和客戶溝通 IR 相關的 methodology 並開發流程解決問題

1. 與業務使用者進行需求訪談與流程討論 2. IT 相關服務的專案管理 3. 公司商務領域的數位化（應用系統、人工智慧、數據）轉型 1. Engagement and Process Discussion with Business Users. (FIN domain) 2. Project Management on IT Service 3. Digitalization (application, AI, data) Transformation for business domain

* 資深SI/PI工程師 * 封裝/電路板 SI/PI設計與晶片開發於消費型產品, 車用以及企業級高效運算產品 * 記憶體以及高速Serdes SI/PI設計 * 高效能CPU/GPU/APU PI以及PDN設計 * 建立封裝/電路板的高速序號設計準則, PDN電氣規格, 以利產品進行