轉職熱搜工作
您正在找IC設計工程師的工作,共計553筆職缺在等你,馬上去應徵吧!
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SoC Verification Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1.Writing behavioral model 2.Responsible for functional verification展開 -
Senior SoC Verification Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗Joining in specification definition, designing verification platform, developing behavioral models, and responsible for system and functional verification展開 -
(Germany) Sr. Field Application Engineer – Automotive Ethernet
面議(經常性薪資達4萬元或以上) 40000元 中歐德國 3~4年工作經驗1. Summary Realtek Semiconductor Corp., located in the Hsinchu Science-based Industrial Park, Taiwan‘s 〝Silicon Valley〝, established in 1987. Realtek‘s efforts to provide the ultimate in pioneering IC technology — along with its firm commitment to creating unique and innovative designs for a broad range of high-tech applications — have won the company a worldwide reputation and made possible a favorable and consistent growth rate in the years since its establishment. In line with the Realtek culture of 〝Self-confidence and trust in people〝, we believe that we can achieve our best, and trust our colleagues can also do the same. Working and learning in Realtek, we openly share knowledge and experience with one another to inspire innovation and pursue growth of the company, as well the individuals. Talent is the important capital of Realtek. Welcome to Join Realtek Family! 2. Essential Job Functions ‧Locate in Southern part of Germany (Frankfurt to Stuttgart, or Stuttgart to Munich) ‧Provide pre-sales and post-sales support. ‧Understand customer requirements, and deliver technical presentations, reports, documents and technology demonstrations. ‧Support customer product development and design. ‧Support customer issue analysis and resolve. ‧On-site support for debug or certification test. ‧Cross-functional collaboration with Realtek internal resources. 3. Education, Skills, Abilities, And Experience Required ‧M.S. or B.S. in Engineering or equivalent. ‧3 to 5 years of progressive professional technical experience in IC design or related areas, direct experience in IC design house FAE is preferred. ‧Strong analytical and problem solving skills. ‧Strong written/verbal communication and negotiation skills. ‧Being proactive and willing to take initiatives. ‧Ability to work independently to achieve goals. ‧Ability to understand and explain technical issues and solutions to technical and non-technical personnel. ‧Native German skill. ‧Medium or higher English skill. ‧Familiar with Ethernet protocols will be a plus. ‧Familiar with Automotive ecosystem will be a plus. ‧Basic or higher Chinese skill will be a plus. ‧Experience of Linux system will be a plus. 4. Industry Automotive Ethernet, Semiconductor 5. Employment Type Full-time 6. Job Functions Engineering, Business Development展開 -
Senior Physical Design / APR Engineer / APR Manager(新竹)
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 5~6年工作經驗Job function: 1. Work with Digital Design team for Physical Design of SoC chips including top level floor planning, block partition, timing budgeting, power planning, block integration, whole chip timing closure, and tape out. 2. Responsible for physical design methodology research and development. 3. Cross site projects coordination and management. Requirement: 1. MS with 5+ years of experience in Physical Design. 2. Familiar with Unix/Linux environment and scripts. 3. Familiar with ASIC design flow. 4. Familiar with Physical Design EDA tools. 5. Good communication and team working skills. 6. Experience in handling large scale SoC chip implementation is a plus.展開 -
SSD專案經理
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 5~6年工作經驗工作項目: SSD專案 Leader,帶領團隊開發 SSD產品。 應徵條件: 1. 碩士以上; 電機工程、電信工程、電控工程、電子工程相關科系畢業為主。 2. 具5年以上相關工作經驗: (1) 精通 SATA interface protocol. (2) 精通 PCIe interface protocol. (3) 精通 NAND flash protocol. (4) 精通 LDPC演算法。 (5) 精通 Digital design流程或具其他相關經驗者為佳。展開 -
SoC整合專案副理/專案經理
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 6~7年工作經驗工作項目: 1. SOC integrator! A challenging job for integrating the designs from over 100 digital designers and tens of analog designers. A challenging job of using deep submicron process. 2. Building & Improving the standard environment for digital designers to run front-end flow, such as synthesis, STA analysis, linting, and so on. 3. Cooperating with APR designers for backend timing closure. 4. Block / Whole-Chip CTS (Clock-tree Synthesis) analysis and improvement. 應徵條件: 1. 碩士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程等相關科系畢業為主。 2. 熟悉 verilog, verdi, STA, synthesis. 3. 具 CTS(Clock tree synthesis) Design/Debug經驗者尤佳。 4. 會寫 script如 perl者更佳。 5. 具六年以上相關工作經驗。展開 -
數位IC設計工程師
面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘1. Architecture design and RTL implementation of Smartphone chipset 2. Smartphone SoC and mobile computing platform design. 3. System bus and mobile peripheral designs 4. SoC system performance analysis展開 -
驗證分析工程師
面議(經常性薪資達4萬元或以上) 40000元 新北市泰山區 工作經歷不拘1. 新產品開發驗證、除錯及測試。 2. 電子電路設計驗證分析,協助解決電路設計上的問題。 3. 跨部門合作、鑑定、確認及解決相關研發的問題。 [如具相關工作經驗, 薪資另議]展開 -
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專案管理工程師
面議(經常性薪資達4萬元或以上) 40000元 新北市泰山區 1~2年工作經驗(1)按照專案時程,規劃研發單位間設計資料傳遞計畫及跟催。 (2)協助聯繫公司各部門需求,協助按公司規範確保產品符合客戶需求。 『具工作經驗者,薪資另議』展開
