轉職熱搜工作
您正在找熱傳工程師的工作,共計253筆職缺在等你,馬上去應徵吧!
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TCAD RD Engineer (Simulation)
面議(經常性薪資達4萬元或以上) 40000元 新竹市 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=550&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: Apply advanced computational models to predict performance, optimize structure and doping profile, and provide improvement directions in nano-scaled device technologies. Develop and apply finite element method (FEM) modelling, including but not limited to stress simulations, computational fluid-dynamics, thermal conductivity simulations and electromagnetic wave simulations, for both macroscopic (tool/wafer) and microscopic (discrete device) structures. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
R&D IIP 3DIC Metrology Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 2~3年工作經驗【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=15353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Packaging‘s mission is to provide the best heterogeneous integration technology (HIT) that realizes system expansion and performance improvement, and to influence the development of the industrial ecosystem by achieving innovation together with our partners as the leading advanced packaging solution provider. Responsibilities: Act as first line guardian of TSMC world class chip manufacturing process. Ensure the stable quality of wafers output by monitoring and adjusting process parameters to enhance machine efficiency. 1. Develop and maintain baselines, including setting up recipes. (1) Improve the stability and accuracy of metrology recipes to enhance yield and reliability qualifications. (2) Responsible for transferring metrology solutions to volume manufacturing. 2. Employ cutting-edge technology to 3DIC metrology, including SoIC, CoWoS, InFO, and Panel. (1) Leverage your analytical abilities to improve metrology performance, guaranteeing high yield and device efficiency. (2) Identify challenges, formulate methodologies, propose solutions, and new metrology evaluation plans. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
R&D IIP Simulation Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16521&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. We are seeking a highly motivated and talented R&D Engineer to join our team in developing advanced IC packaging technologies. This position offers an exciting opportunity to work on cutting-edge solutions, such as CoWoS (Chip-on-Wafer-on-Substrate), Fan-Out Wafer Level Packaging (FOWLP), and 3DIC (Three-Dimensional Integrated Circuits). The ideal candidate will have strong technical expertise and a passion for innovation in semiconductor packaging design and analysis. Join us in shaping the future of advanced IC packaging technologies and contributing to groundbreaking innovations in the semiconductor industry. This role provides a unique opportunity to work in a dynamic environment, solve challenging engineering problems, and make a meaningful impact on next-generation packaging solutions. Responsibilities: 1. Conduct risk assessments and provide mitigation plans for IC packages through simulation and experiment, interpreting experimental data and simulation to provide insights into material selection and design improvements. 2. Practice FEM and DOE in problem solving and path finding particularly on packaging. Conduct mechanical or thermal simulations using finite element analysis (FEA) techniques to evaluate and optimize packaging performance, and analyze stress, deformation, and heat dissipation characteristics to ensure reliability and efficiency of packaging designs. 3. Continuously improve simulation methodology, refine material modeling, and enhance script automation capabilities. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
光電量產測試主管_半導體大廠 (3009984)
面議(經常性薪資達4萬元或以上) 40000元 桃園市龜山區 5~6年工作經驗職責要求 量產測試策略與規格制定 • 建立並維運 EML / EEL 雷射量產測試流程與規格(含 bar level 與 die level) • 定義產品量測條件(bias、溫度、功率、耦合方式、測試順序)與允收判定 • 建立量產測試資料規範(traceability、sampling plan、SPC/CPK)與異常處理機制 Bar Tester 量產測試系統與導入 • 主導 bar tester 之量產導入、機台規格評估、UPH 提升與測試時間最佳化 • 確保 bar-level 測試可支援高產能需求,並兼顧測試一致性與可靠性 • 規劃與改善 probe / chuck / thermal control / alignment 等關鍵測試模組 電學與光學量測(核心必備) • 熟悉基本電學量測並可判讀結果: 測試程式與自動化能力 • 具備 C 語言能力,可用於測試控制、資料處理、演算法或儀器通訊整合 • 熟悉 LabVIEW,可支援自動化測試系統開發、維護與debug • 熟悉測試儀器控制與資料整合(例如 SMU、OSA、power meter、thermal controller 等) 良率 / 成本 / 產能改善(Yield & Cost & UPH) • 透過測試資料分析推動良率改善與成本下降(降低 retest、減少 false reject/escape) • 建立量產測試的 DOE、GR&R、MSA 與校驗制度 • 推動 station balance、瓶頸改善與 24hr line stability(含夜班品質一致性) 量產工廠與團隊管理 • 管理測試工程與產線團隊,建立 24 小時運作所需的班別制度與管理流程 • 與製程、設備、品質、製造、NPI、客戶工程團隊合作,快速收斂問題 • 定期對內部與客戶提供量產狀態報告(yield、capacity、quality metrics) 任職資格 • 5 年以上光電半導體或光通訊產業經驗,具 雷射元件量產測試經驗者優先 • 熟悉 InP-based EML / EEL 或高速光通訊雷射相關產品 • 具備 bar level / wafer level / die level 測試觀念與實務經驗 • 具備基本電學與光學測試能力,必須能執行並判讀:IV Curve(I-V)、Near field / Far field、Optical Spectrum Analyzer / Optical Spectrum Meter • 具備測試自動化與程式能力:C 語言(必要)、LabVIEW(必要) • 具跨部門溝通能力,可帶領團隊解決量產問題並推動改善 • 能以英文進行基本技術溝通、測試報告與客戶對談展開 -
Product Engineer(USA)_電子大廠 (3009839)
面議(經常性薪資達4萬元或以上) 40000元 美國加利福尼亞州 工作經歷不拘1.Review, study and analyze customer engineering data file package 2.Provide labor quotation to program manager 3.Prepare for the job’s engineering readiness for our production that includes: defining manufacturing process, designing and ordering tooling/stencil, determining process parameters, tuning reflow thermal profile, creating MPI – Manufacturing Process Instructions, monitoring the actual production build, conducting process improvement if applicable, all the way until product is shipped out of door to customer 4.Interface with team member of all job functions – program manager, purchasing buyer, stockroom team, production team, quality team. 5.Interface with customer’s engineering counterpart to provide support, feedback and solution for issues that may include, but not limited to, providing DFM (Design for Manufacturability) report to customer, to help improve the product’s manufacturability, production efficiency and quality yield. 6.Special technical, engineering related tasks assigned by engineering director for manufacturing process study and/or development.展開 -
國家太空中心-太空運輸系統結構組-熱控工程師
面議(經常性薪資達4萬元或以上) 40000元 台南市歸仁區 3~4年工作經驗1.執行火箭載具的熱建模與分析。 2.進行熱控設計權衡研究(Trade study),平衡性能、資源、風險、成本與時程。 3.解決火箭載具組件與系統的熱設計、測試與性能問題。 4.設計並執行火箭載具元件與組件的熱測試。 5.使用測試與飛行數據進行熱模型驗證(model validation) 6.尋找與評估熱控材料供應商。展開 -
國家太空中心-衛星機械組-衛星機械技術員-2(專案計畫人員)
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1.支援衛星熱控硬體CAD繪製、製作與組裝 2.衛星結構或衛星元件組裝整合 3.支援衛星熱環境測試 4.實驗室設備建立及維護展開 -
國家太空中心-衛星機械組-衛星熱傳工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1.衛星熱控硬體CAD繪製、製作與組裝 2.支援衛星熱環境測試與元件熱模擬 3.實驗室設備建立及維護 -
Energy Storage System Design Engineer(儲能系統工程師)_車用電池系統製造商 (3009786)
面議(經常性薪資達4萬元或以上) 40000元 桃園市龜山區 工作經歷不拘職責要求 1. Plan and configure energy storage systems for various application scenarios, including: A. High-voltage battery packs and related components B. PCS, DC/DC converters, and high-voltage distribution equipment C. High-voltage safety and protection devices, such as contactors, fuses, and circuit breakers D. Thermal management solutions for optimal system performance. 2. Select and validate key components (e.g., PCS, DC/DC converters, switchgear, protection devices, and cable specifications) based on project requirements and grid codes. 3. Create and review wiring diagrams and single-line diagrams to ensure compliance with power system standards and safety regulations. 4. Collaborate with hardware and software teams to ensure compatibility and communication between EMS, BMS, PCS, and DCDC using protocols such as Modbus, CAN, and Ethernet. 5. Ensure compliance with regulatory standards for power grid integration, including grid codes and EMI/EMC regulations. 6. Provide on-site technical support and troubleshooting, including system commissioning, grid-connection testing, and functional verification. 7. Prepare technical documentation, including wiring diagrams, planning reports, and installation manuals, and assist with project acceptance testing. 任職資格 1. Master’s degree in Electrical Engineering, Electronics Engineering, or a related field. 2. Experience in integrating ESS components (BESS, PCS, EMS) into grid-connected or microgrid systems. 3. Proficiency in reading and creating single-line diagrams, wiring diagrams, and electrical schematics; experience with design tools (e.g., AutoCAD, EPLAN) is a plus. 4. Knowledge of power system integration concepts, including grid synchronization, reactive power展開 -
資深水冷工程師_Lab_知名散熱大廠 (3009667)
面議(經常性薪資達4萬元或以上) 40000元 高雄市前鎮區 工作經歷不拘職責要求 1.專案進度管理 2.液冷系統規劃設計 3.測試平台建立 4.新產品技術開發 任職資格 1.具備3D繪圖、管路設計能力 2.熟悉熱流知識與模擬分析展開
