轉職熱搜工作

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22576&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Novel process/device/product developing for Specialty technologies. 2. Process Integration/Module, Device Analysis/Simulation, Modeling, Test-chip design tape out and WAT/Bench measurement system developing. 3. Collaborate with related teams for Design Collaterals (DRM/DRC/LVS/SPICE/PDK) developing. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.

1. Design and test for related thermal function and create fan curve to fit acoustic spec. 2. Communicate all thermal-related information with suppliers, internal teams and customers. 3. Provide thermal report.

1 Develop the Timing/EM signoff criterion for leading process node and 3DIC. 2 Maintain the Timing/EM Signoff criterion ,provide issue solving and consultant for projects on abnormal/unfixable timing/EM violation 3 Develop new Timing/EM signoff methodology to be applied during chip synthesis/APR/STA/EM . 4 SPICE correlation for new timing/EM signoff criterion 5 Regression test for every signoff methodology by STA violation/slack analysis, EM results 6 Post-silicon data analysis for silicon-proven timing/EM signoff criterion

1. Contribute to the development and enhancement of design methodologies for 2.5D and 3D IC advanced package design. 2. Lead the development of new design and signoff flows for physical, electrical, and thermal quality assurance. 3. Support package design teams in defining a tool roadmap for advanced package design. 4. Contribute to interposer designs, advanced package designs, and test vehicles for the product design roadmap and feasibility. 5. Represent the Package design team in customer engagements for advanced package designs.

1.支援客戶端使用車用IC 於座艙系統, ADAS 系統的硬體應用開發事項，協助客戶review PCB schematic and layout design的問題, 解決客戶相關的硬體開發及生產面臨的問題。 2. 需要出差到韓國, 日本, 美國或是歐洲等海外客戶。 3. 需要用英文與客戶溝通。

- This position is for an SoC Architect, responsible for evaluating the technical feasibility and architectural direction of new products prior to project kickoff. - The role requires close collaboration with business teams to clarify market needs and product requirements, as well as cooperation with engineering teams to explore the competitiveness and feasibility of various SoC architecture options. - The architect will integrate cross-functional inputs to define the optimal system-on-chip design architecture, serving as the foundation for subsequent product development. - 此職缺為 SoC Architect，負責於專案啟動前進行產品的技術可行性與架構方向評估。 - 需與商務單位合作，釐清市場需求與產品規格；並與各工程團隊協作，探索不同 SoC 架構方案的優劣與競爭力，評估技術風險與可行性。 - 最終需整合跨部門意見，制定最佳化的系統晶片設計架構，作為後續產品開發的基礎。

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

先進封裝技術開發 1. 先進新產品導入技術開發 (新產片試產規劃, DRC/DRM檢驗, DOE及良率改善規劃, 量產區間及良率分析) 2. 熟悉先進chiplet及3DIC封裝技術開發 3. 晶圓級與面板級先進封裝結構設計

職責要求 1. Familiar in design for active cooling and passive cooling. 2. RFP/ RFQ thermal solution design and performance evaluation including the cost estimation. 3. According to projects to generate the document related to the thermal portion, like PTS, test plan for the thermal portion, design guide of the thermal portion. 4. Strong capability of thermal model building and running the thermal simulation by flotherm and icepak. 5. New technology research and study in thermal fields. 任職資格 1. Be well-managed the multi-task. 2. Familiar in problem solving for cross functions. 3. Good domain knowledge in electrical component parts. 4. Experienced in using test facilities to do the thermal test, like data logger, thermometer, thermocouple attached and thermal chambers. 5. Excellent presentation skill in English and Mandarin. 6. Farmilar in icepak and flotherm.