熱傳工程師|1111轉職專區
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轉職熱搜工作

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  • 【ODM service 硬體研發部】系統研發高級/資深工程師

    面議(經常性薪資達4萬元或以上) 40000元 新北市汐止區 5~6年工作經驗
    1. 系統硬體規劃及整合設計 2. 撰寫及執行相關 test plan 3. 解決產品開發、認證到量產相關問題 4. 量產產品的維護 *彈性工作時間,薪優福利佳,並備有新店/中和線交通車*
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  • 【智能設計服務系統研發部】系統硬體研發工程師(Server)

    面議(經常性薪資達4萬元或以上) 40000元 新北市汐止區 5~6年工作經驗
    1.Server / Edge Computing / Industrial Server 系統經驗 2.系統測試、驗證與問題分析 3.Thermal / Power / Performance 評估與系統級分析與優化 4.設計與驗證 BMC / BIOS / FW 整合流程 5.使用 Redfish API / IPMI 進行伺服器遠端管理、監控與自動化 6.與 EE / ME / FW / PM / BU 協作,解決跨模組系統問題 *彈性工作時間,薪優福利佳,並備有新店/中和線交通車*
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  • 【嵌入式設計服務電子研發部】Senior Power Engineer/資深電源工程師

    面議(經常性薪資達4萬元或以上) 40000元 新北市汐止區 5~6年工作經驗
    1. 負責 x86 / IPC / Server / Embedded 主機板之電源架構規劃與設計 2. 主導 Power Tree 定義(如 +12V / +5V / +3.3V / Core / VDDQ / AUX rails) 3. 設計並驗證 DC-DC、Buck / Boost、LDO、VR、POL 等電源電路 4. 規劃與實作 Power Sequencing、Enable/Reset、Protection(OCP / OVP / UVP / SCP) 5. 依 CPU / Chipset / DDR / PCIe 規格,整合平台電源需求(Intel / AMD Design Guide) 6. 主導 Bring-up 與電源除錯(Ripple / Noise / Load transient / Thermal) 7. 與 Layout / SI / EMC 工程師協作,解決 PI / EMI / 穩定度 問題 8. 撰寫電源設計文件、量測報告,支援 EVT / SIT / DVT / PVT / MP 9. 指導 Junior 工程師,或擔任專案 Power Owner *彈性工作時間,薪優福利佳,並備有新店/中和線交通車* 【公司/團隊吸引力】 我們的產品以 IPC / Server / Embedded 主機板 為主,設計深度高、生命周期長,電源不是配角,而是系統穩定度的關鍵核心。 在團隊中,Power Engineer 擁有高度設計主導權,可從平台規劃階段即參與,真正負責 Power Tree、Rail 定義、Sequencing 與量產品質,不是只做驗證或支援角色。 團隊設計流程成熟(EVT / SIT / DVT / PVT 完整) 專案多為 x86 / Embedded/ 低功耗平台,能累積高階電源設計經驗,適合希望在 板級 Power / 系統電源架構 持續深化的工程師。 鼓勵技術交流與標準化,資深工程師可參與設計規範制定、指導 junior、建立可複用的 power block。 工作氣氛重視專業與溝通,工程師的判斷會被尊重,不以非技術因素強行改設計。
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  • 工研院機械所_模擬分析實習生(K500)

    時薪 220元 新竹縣竹東鎮 工作經歷不拘
    1.以數值方法進行旋轉機械與微波加熱相關之流場與熱傳模擬分析。 2.撰寫與彙整模擬分析結果之技術文件與報告。 3.其他臨時交辦事項
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  • Stress/Thermal simulation engineer

    面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗
    1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation
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  • Package and Chip thermal/stress simulation engineer

    面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 4~5年工作經驗
    1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation
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  • Senior Cloud System Debug Engineer

    面議(經常性薪資達4萬元或以上) 40000元 新北市土城區 工作經歷不拘
    We are seeking an experienced system debug engineer with strong background in the cloud/datacenter domain. In this position, you will play a key role in realizing vision to work closely with Foxconn’s biggest customers: CSPs to enable and scale out Foxconn latest server platforms and technologies. This position will have a chance to touch cutting-edge silicon, server hardware technologies and emerging firmware and OS solutions, and apply them to the CSPs. Responsibilities include: • Mastering the latest Intel/AMD/Ampere hardware and platform features. Tracking the enabling status of those features in silicon, low-level firmware/software, Operating System and latest Linux Upstream Kernel. • Debug customer data-center issues related to platform enabling and customization. Deep dive and root cause silicon enabling and system integration issues to sub system or source code level. • Closely collaborate with silicon enabling, firmware development, and various component teams from third-party vendors (e.g., memory, storage, network, power and performance, thermal/mechanical, I/O, etc.) to troubleshoot and debug cross-discipline and complex integration issues on server platforms. Drive debug taskforce cross functions to ensure timely issue resolution. • Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes • Contribute to validation team on improving test plan/method to validate features and verify fixes • Put new technology into practice in the fastest manner, explore all possible alternatives for better solution, and pursue constant improvement on debug methodology and tool • Define and drive the system debug process implementation and ingredient owner engagement and alignment Qualifications: The candidate should possess a Bachelor of Science in Electrical Engineering, Computer Science or relevant technology (advanced degree is preferred) with 5+ years of applicable industrial experience in the following: • Solid understanding of x86/IA with design experience or working knowledge on CPU, DIMM, Chipset and Platform • Strong low-level debugging skills that enable the root causing of issues across hardware, firmware and OS levels • Experience with ASSET SCANWORKS, Intel ITP and Cscript development. Experience with PythonSV or programming with Python. In-depth knowledge of CPU flows and experience on silicon level debug and ASD (e.g. CrashDump Analysis) are preferred • Solid understanding and hands-on development/validation experience of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc. • Understanding of Operating System, Driver, BIOS and firmware fundamentals. Programming skills (e.g. C/C++) that enable the source code level debug and issue fix is highly preferred. • Experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues; • Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders.
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  • <Data center>Technology Engineer(3.5D methodology)

    面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 5~6年工作經驗
    1. Develop 3.5D methodology from RTL to GDS and Package 2. Coordinate Thermal and PI/SI team to deal with high power design 3. Execute the project at different phases
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  • 【AI Server/Storage】系統架構師

    面議(經常性薪資達4萬元或以上) 40000元 新北市土城區 5~6年工作經驗
    1. 負責 AI Server / Storage 產品之 ODM 開發與系統架構規劃,具伺服器產品開發經驗者尤佳。 2. 規劃 AI 伺服器整體系統架構,包含 GPU Baseboard、CPU、Memory、Storage、高速網路、電源與冷卻系統等核心模組。 3. 負責 AI Server / Storage 產品之模組化設計,確保系統具備高效能、高擴充性、高可用性與可維護性。 4. 針對 AI 訓練與推論應用需求,規劃高速儲存架構,優化資料吞吐量、延遲與大量隨機讀寫效能。 5. 規劃高速快取、NVMe / SSD、儲存控制器與長期資料儲存系統之整合架構,提升資料存取效率與系統可靠度。 6. 參與新專案前期技術評估,協助分析客戶需求、產品規格與技術可行性,提出硬體架構方案與 PoC 規劃。 7. 擔任跨部門技術整合窗口,協調機構、熱傳、SI/PI、電源、韌體、軟體、驗證與製造團隊,確保各模組符合系統設計需求。 8. 主導系統設計審查、風險評估、問題分析與改善追蹤,確保產品開發進度、品質與技術規格符合客戶要求。 9. 定義系統驗證測試項目,包含效能、穩定性、極限負載、散熱、電源、訊號完整性與可靠度測試。
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  • Assistant Manager, Sales- Printing Solution (產業印刷營業處)

    面議(經常性薪資達4萬元或以上) 40000元 台北市信義區 2~3年工作經驗
    - In charge of Digital Textile Printer sales and related projects. - In charge of Direct to Fabrics(DTF), Sublimation Thermal Transfer(ST), Direct to Garment(DTG) market. - Need to understand and familiar textile market and related knowledge. - Need to co-work with PM & Engineer to meet customer‘s demand. - Go to market strategy to meet annual sales business target. - Support channels, customers for sales activities, exhibitions, sample testing...etc.
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