轉職熱搜工作

1. 負責 x86 / IPC / Server / Embedded 主機板之電源架構規劃與設計 2. 主導 Power Tree 定義（如 +12V / +5V / +3.3V / Core / VDDQ / AUX rails） 3. 設計並驗證 DC-DC、Buck / Boost、LDO、VR、POL 等電源電路 4. 規劃與實作 Power Sequencing、Enable/Reset、Protection（OCP / OVP / UVP / SCP） 5. 依 CPU / Chipset / DDR / PCIe 規格，整合平台電源需求（Intel / AMD Design Guide） 6. 主導 Bring-up 與電源除錯（Ripple / Noise / Load transient / Thermal） 7. 與 Layout / SI / EMC 工程師協作，解決 PI / EMI / 穩定度 問題 8. 撰寫電源設計文件、量測報告，支援 EVT / SIT / DVT / PVT / MP 9. 指導 Junior 工程師，或擔任專案 Power Owner ＊彈性工作時間，薪優福利佳，並備有新店/中和線交通車＊ 【公司／團隊吸引力】 我們的產品以 IPC / Server / Embedded 主機板 為主，設計深度高、生命周期長，電源不是配角，而是系統穩定度的關鍵核心。 在團隊中，Power Engineer 擁有高度設計主導權，可從平台規劃階段即參與，真正負責 Power Tree、Rail 定義、Sequencing 與量產品質，不是只做驗證或支援角色。 團隊設計流程成熟（EVT / SIT / DVT / PVT 完整） 專案多為 x86 / Embedded/ 低功耗平台，能累積高階電源設計經驗，適合希望在 板級 Power / 系統電源架構 持續深化的工程師。 鼓勵技術交流與標準化，資深工程師可參與設計規範制定、指導 junior、建立可複用的 power block。 工作氣氛重視專業與溝通，工程師的判斷會被尊重，不以非技術因素強行改設計。

1.負責 Notebook、AI PC、Desktop 及各類 3C 電子產品散熱方案規劃與技術決策。 2.帶領散熱團隊執行產品開發，確保設計品質、專案時程及量產目標達成。 3.主導熱流模擬、散熱測試驗證及技術問題分析與改善。 4.制定散熱設計規範、設計流程及技術標準，提升團隊設計能力與開發效率。 5.跨部門協調機構、電子、BIOS、聲學、工廠及供應商資源，推動專案順利進行。 6.參與客戶技術討論，提供散熱解決方案並建立良好客戶關係。 7.評估與導入新散熱技術，支援 AI PC、高效能運算及新世代產品開發。 8.培育團隊成員，建立人才梯隊及技術傳承機制。

1. Familiar in design for active cooling and passive cooling. 2. RFP/ RFQ thermal solution design and performance evaluation including the cost estimation. 3. According to projects to generate the document related to the thermal portion, like PTS, test plan for the thermal portion, design guide of the thermal portion. 4. Strong capability of thermal model building and running the thermal simulation by flotherm and icepak. 5. New technology research and study in thermal fields.

1.系統散熱與噪音設計(System Thermal and Acoustic Design) 2.專案在散熱部分的執行(Project execution on thermal related portion) 3.散熱驗證(Thermal validation) 4.開發新技術(Develop new thermal technology) ※依學經歷、工作年資敘薪

1.工業低碳燃燒技術研發，專注於新燃料配比最佳化、廢氣處理與低NOx技術等，以達成減少碳排與空污控制研究 2. 建立燃燒實驗裝置，執行各種混燒與燃燒實驗，以獲取相關熱力學數據和數值模型驗證所需資料 3. 製程熱流場解析運用計算流體力學（CFD）模擬燃燒過程，並與實驗結果相互校正，以提升低碳燃燒技術效能 4. 與國內外學術界和產業界合作，共享研究成果並促進技術交流，共同推進低碳能源的應用發展

1. CDU與機櫃解熱方案設計 (CDU and rack thermal solution design) 2. 專案在熱對策部分的執行與驗證 (Project execution and validation of thermal related portion) 3. 帶領小組成員專案執行與管理彙報 (Team member leading, project execution and manegement) 4. 開發新技術 (New technology research and study in thermal fields.) 5. 專案週期管理 (Project Mileston control)

1. Lead cross-functional development of L11 rack-level and CDU projects, including coordination of L12 data center integration and management. Candidates must demonstrate deep familiarity with L11/ L12 data center infrastructure design standards and deployment best practices. 2. Architect and optimize thermal solutions at the L11 rack level, encompassing both air-cooled and liquid-cooled configurations. Proven experience in balancing performance, reliability, and manufacturability is essential. 3. Drive the design and development of CDU systems supporting both air and liquid cooling technologies. Candidates should have hands-on experience in component selection, system validation, and supplier collaboration. 4. Next gen innovation in thermal and mechanical technologies. 5. Well team leading and lab management skill.

本職位需具備獨立作業能力，負責帶領或執行伺服器產品之液冷與氣冷散熱機構設計與驗證。 1. 液冷散熱系統架構設計與開發： o 主導伺服器液冷系統（Liquid Cooling）的架構規劃與細部設計，包含冷板（Cold plate）、分歧管（Manifold）、CDU（Coolant Distribution Unit）及快接頭（UQD）等組件選型與整合設計。 o 負責 Direct-to-Chip (D2C) 或 Immersion Cooling (浸沒式) 等先進散熱技術的評估與導入。 2. 熱流模擬與機構分析： o 獨立執行與審查熱流模擬分析（如 Flotherm, Icepak, CFD），優化散熱效能並解決系統熱點問題。 o 進行機構堆疊（Stack-up）分析、公差分析，確保設計的可製造性（DFM）與組裝性（DFA）。 3. 專案管理與跨部門協作： o 與 EE、Layout、Power 及 SI/PI 團隊緊密合作，解決機構與電子零件的干涉與散熱挑戰。 o 管理專案開發時程（NPI 到 MP），管控模具開發進度與品質，並處理試產及量產階段的機構問題（Issue debug & failure analysis）。 4. 供應商管理與新技術研究： o 與散熱模組供應商（Vendor）進行技術規格制定、驗收與製程檢討。 o 持續研究業界最新的伺服器散熱規範與技術趨勢，建立內部的技術規範（Design Guide）。

We are seeking an experienced system debug engineer with strong background in the cloud/datacenter domain. In this position, you will play a key role in realizing vision to work closely with Foxconn’s biggest customers: CSPs to enable and scale out Foxconn latest server platforms and technologies. This position will have a chance to touch cutting-edge silicon, server hardware technologies and emerging firmware and OS solutions, and apply them to the CSPs. Responsibilities include: • Mastering the latest Intel/AMD/Ampere hardware and platform features. Tracking the enabling status of those features in silicon, low-level firmware/software, Operating System and latest Linux Upstream Kernel. • Debug customer data-center issues related to platform enabling and customization. Deep dive and root cause silicon enabling and system integration issues to sub system or source code level. • Closely collaborate with silicon enabling, firmware development, and various component teams from third-party vendors (e.g., memory, storage, network, power and performance, thermal/mechanical, I/O, etc.) to troubleshoot and debug cross-discipline and complex integration issues on server platforms. Drive debug taskforce cross functions to ensure timely issue resolution. • Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes • Contribute to validation team on improving test plan/method to validate features and verify fixes • Put new technology into practice in the fastest manner, explore all possible alternatives for better solution, and pursue constant improvement on debug methodology and tool • Define and drive the system debug process implementation and ingredient owner engagement and alignment Qualifications: The candidate should possess a Bachelor of Science in Electrical Engineering, Computer Science or relevant technology (advanced degree is preferred) with 5+ years of applicable industrial experience in the following: • Solid understanding of x86/IA with design experience or working knowledge on CPU, DIMM, Chipset and Platform • Strong low-level debugging skills that enable the root causing of issues across hardware, firmware and OS levels • Experience with ASSET SCANWORKS, Intel ITP and Cscript development. Experience with PythonSV or programming with Python. In-depth knowledge of CPU flows and experience on silicon level debug and ASD (e.g. CrashDump Analysis) are preferred • Solid understanding and hands-on development/validation experience of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc. • Understanding of Operating System, Driver, BIOS and firmware fundamentals. Programming skills (e.g. C/C++) that enable the source code level debug and issue fix is highly preferred. • Experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues; • Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders.