轉職熱搜工作

1. 負責 x86 / IPC / Server / Embedded 主機板之電源架構規劃與設計 2. 主導 Power Tree 定義（如 +12V / +5V / +3.3V / Core / VDDQ / AUX rails） 3. 設計並驗證 DC-DC、Buck / Boost、LDO、VR、POL 等電源電路 4. 規劃與實作 Power Sequencing、Enable/Reset、Protection（OCP / OVP / UVP / SCP） 5. 依 CPU / Chipset / DDR / PCIe 規格，整合平台電源需求（Intel / AMD Design Guide） 6. 主導 Bring-up 與電源除錯（Ripple / Noise / Load transient / Thermal） 7. 與 Layout / SI / EMC 工程師協作，解決 PI / EMI / 穩定度 問題 8. 撰寫電源設計文件、量測報告，支援 EVT / SIT / DVT / PVT / MP 9. 指導 Junior 工程師，或擔任專案 Power Owner ＊彈性工作時間，薪優福利佳，並備有新店/中和線交通車＊ 【公司／團隊吸引力】 我們的產品以 IPC / Server / Embedded 主機板 為主，設計深度高、生命周期長，電源不是配角，而是系統穩定度的關鍵核心。 在團隊中，Power Engineer 擁有高度設計主導權，可從平台規劃階段即參與，真正負責 Power Tree、Rail 定義、Sequencing 與量產品質，不是只做驗證或支援角色。 團隊設計流程成熟（EVT / SIT / DVT / PVT 完整） 專案多為 x86 / Embedded/ 低功耗平台，能累積高階電源設計經驗，適合希望在 板級 Power / 系統電源架構 持續深化的工程師。 鼓勵技術交流與標準化，資深工程師可參與設計規範制定、指導 junior、建立可複用的 power block。 工作氣氛重視專業與溝通，工程師的判斷會被尊重，不以非技術因素強行改設計。

We are seeking an experienced system debug engineer with strong background in the cloud/datacenter domain. In this position, you will play a key role in realizing vision to work closely with Foxconn’s biggest customers: CSPs to enable and scale out Foxconn latest server platforms and technologies. This position will have a chance to touch cutting-edge silicon, server hardware technologies and emerging firmware and OS solutions, and apply them to the CSPs. Responsibilities include: • Mastering the latest Intel/AMD/Ampere hardware and platform features. Tracking the enabling status of those features in silicon, low-level firmware/software, Operating System and latest Linux Upstream Kernel. • Debug customer data-center issues related to platform enabling and customization. Deep dive and root cause silicon enabling and system integration issues to sub system or source code level. • Closely collaborate with silicon enabling, firmware development, and various component teams from third-party vendors (e.g., memory, storage, network, power and performance, thermal/mechanical, I/O, etc.) to troubleshoot and debug cross-discipline and complex integration issues on server platforms. Drive debug taskforce cross functions to ensure timely issue resolution. • Contribute to the definition of new platforms with software architecture and development teams, support platform bring-up activities, review designs and code changes • Contribute to validation team on improving test plan/method to validate features and verify fixes • Put new technology into practice in the fastest manner, explore all possible alternatives for better solution, and pursue constant improvement on debug methodology and tool • Define and drive the system debug process implementation and ingredient owner engagement and alignment Qualifications: The candidate should possess a Bachelor of Science in Electrical Engineering, Computer Science or relevant technology (advanced degree is preferred) with 5+ years of applicable industrial experience in the following: • Solid understanding of x86/IA with design experience or working knowledge on CPU, DIMM, Chipset and Platform • Strong low-level debugging skills that enable the root causing of issues across hardware, firmware and OS levels • Experience with ASSET SCANWORKS, Intel ITP and Cscript development. Experience with PythonSV or programming with Python. In-depth knowledge of CPU flows and experience on silicon level debug and ASD (e.g. CrashDump Analysis) are preferred • Solid understanding and hands-on development/validation experience of popular server/PC technologies including PCI/PCI-E, USB, SAS/SATA, i2C/SMBUS, IPMI, BIOS/EFI and DIMM, Storage, Networking, Virtualization, Manageability, Security, RAS, etc. • Understanding of Operating System, Driver, BIOS and firmware fundamentals. Programming skills (e.g. C/C++) that enable the source code level debug and issue fix is highly preferred. • Experience at model-based problem solving that enable the effective investigation and narrow-down of complex issues; • Demonstrated capability to work within a team environment facing fast-changing requirements and complicated stakeholders.

- In charge of Digital Textile Printer sales and related projects. - In charge of Direct to Fabrics(DTF), Sublimation Thermal Transfer(ST), Direct to Garment(DTG) market. - Need to understand and familiar textile market and related knowledge. - Need to co-work with PM & Engineer to meet customer‘s demand. - Go to market strategy to meet annual sales business target. - Support channels, customers for sales activities, exhibitions, sample testing...etc.

1. 負責高效能散熱模組及致冷晶片系統等高可靠度電子產品的結構設計。 2. 熟練運用 3D CAD 軟體進行精密建模、公差分析、2D 工程圖面繪製及 GD&T 標註，確保設計具備高製造性（DFM）。 3. 運用CFD模擬（如ANSYS Icepak、FloTHERM）進行熱流分析與優化散熱架構並評估潛在熱風險。 4. 主導符合車用規範（如 IATF 16949，APQP等）的機構設計，規劃並執行嚴格的環境試驗、機械應力與可靠度驗證（如冷熱衝擊、震動、高溫高濕測試）。 5. 主導產品設計流程（EVT / DVT / PVT），與製程、模具及品保團隊緊密配合，解決試產階段的技術瓶頸，順利導入跨國或在地規模量產。 6. 與材料、模具及零件供應商進行技術規格對接，評估關鍵零組件（如 TEC、均溫板、散/導熱元件 等）之可行性。 7. 完成其他主管交辦事項。

1.前瞻熱處理與表面處理製程開發（含鍍膜成分設計與選用） 2.CAE數值模擬與製程分析（熱傳／應力／相變） 3.材料與表面工程技術開發與應用導入 4.材料性質分析（硬度、金相、磨耗、鍍層特性） 5.研究計畫提案、規劃、執行與成果產出 6.技術服務推廣與產業應用支援

1.處理文書類報告 ex: 出貨報告、承認書…等 2.學習專業檢驗儀器操作 (VNA阻抗量測、打線推拉力機台、Thermal morie) 3.4M/專案實驗委託安排&追蹤彙整 4.代理廠QA助理