轉職熱搜工作
您正在找半導體製程工程師的工作,共計947筆職缺在等你,馬上去應徵吧!
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(台中)半導體設備工程師
月薪 37500~50000元 台中市大雅區 工作經歷不拘我們是一家專注於半導體製造領域的專業技術公司,為客戶提供先進的設備解決方案、技術支持及相關服務。主要客群涵蓋晶圓製造商與積體電路設計公司,致力於推動科技創新與產業升級。 工作內容: 1. 於無塵室環境作業,需熟悉無塵衣穿著流程及規範。 2. 進行半導體製程設備的安裝、組裝及調試,確保設備正常運行。 3. 負責設備日常維護及故障偵測與排除,以提升生產效率及降低停機風險。 4. 協助製程測試與優化工作,確保產品品質達到客戶需求。 5. 定期執行設備保養計劃,延長設備使用壽命並改善其性能。 6. 分析設備運行數據,提供優化建議,持續改善生產製程。 7. 與相關部門進行技術協作,解決生產過程中的技術問題。 8. 提供現場人員設備操作與維護培訓,提升生產團隊的技術能力。 歡迎對半導體產業充滿熱忱且願意積極學習的您加入我們,不論您是否有相關經驗,我們重視您的潛力及成長機會,期待您成為我們團隊的一份子!立即投遞履歷,與我們一同推動科技創新!展開 3日回覆 -
(南科)半導體設備工程師
月薪 37000元 台南市新市區 工作經歷不拘1. 無塵室作業環境需穿著無塵衣。 2. 半導體設備組裝、維修、保養、調機。 3. 可配合平日和假日加班。 4. 享三節禮金。 5. 歡迎社會新鮮人,肯學習,無經驗可。展開 -
台灣半導體研究中心-(115-028)半導體製程技術之元件驗證工程師或研究員_蝕刻薄膜組
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1. 先進半導體電漿薄膜與電漿蝕刻製程技術開發。 2. 先進半導體元件整合、製程驗證與材料/電性分析。 3. 半導體技術專案計畫執行。 4. 其它主管交辦事項。展開 -
台灣半導體研究中心-(115-016)建廠廠務人員_異質整合製程組
面議(經常性薪資達4萬元或以上) 40000元 台南市北區 4~5年工作經驗1. 執行請購業務、工程估驗及驗收作業。 2. 半導體廠建廠各系統原理規劃、協助基本設計、細部設計、五大管線審查業務業務。 3. 參與建廠審查計畫(BIM、結構系統設計、自動控制、系統管線、節能)等相關會議。 4. 協助廠務系統運轉及維護保養。 5. 其他臨時交辦事項。展開 -
(05)【2026新幹班】半導體類 Semiconductor
面議(經常性薪資達4萬元或以上) 40000元 新北市土城區 工作經歷不拘協助執行 IC 設計驗證、先進封裝測試與製程數據分析。參與功率半導體研發專案的實驗採集;配合追蹤良率數據,學習車用電子零件之設計與整合規範。 Assist in IC design verification, advanced packaging testing, and process data analysis. Participate in power semiconductor R&D data collection. Support yield tracking and learn automotive component design specs.展開 -
台灣半導體研究中心-(115-017)營建品質管理人員_異質整合製程組
面議(經常性薪資達4萬元或以上) 40000元 台南市北區 4~5年工作經驗1. 營造土建品質查核及管理。 2. 營造工程進度管理。 3. 依任務需求協助土建、機電AutoCAD套圖審查及修改。 4. 依任務需求協助建立建物及內裝3D透視圖。 5. 依任務需求協助建築BIM衝突偵測與檢討。 6. 其他臨時交辦事項。展開 -
設備工程師/客戶端服務工程師(新竹)
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 5~6年工作經驗1. 於客戶端執行設備的安裝、保養、維修及機台異常排除等。 2. 協助設備操作、參數設定,並進行試樣製程與樣品測試等。 3. 依公司安排至客戶端進行短期出差。(依公司差旅制度辦理) 4. 配合任務性質,支援國內外客戶端之服務需求。展開 -
Principal Process Integration Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘Please also apply on our platform: https://nxp.wd3.myworkdayjobs.com/careers/job/Hsinchu/Principal-Process-Integration-Engineer_R-10063266 Job Description 【Why This Role?】 Drive Core Technology: Lead the integration and development of advanced CMOS processes and Non-Volatile Memory (NVM), directly impacting product performance and market competitiveness. Lead Mass Production Breakthroughs: Take ownership of the critical path from New Product Introduction (NPI) to high-volume manufacturing, defining technical specifications and Best Known Methods (BKM). Cross-Domain Collaboration: Bridge the gap between design teams and Tier-1 Foundries, exerting technical influence at advanced process nodes (28nm and below). 【Key Responsibilities】 Process Integration Leadership: Lead the design of CMOS and NVM process flows; optimize device performance to achieve industry-leading yield and reliability benchmarks. Deep Characterization & Analysis: Conduct statistical and Physical Failure Analysis (PFA) for fail modes; proactively identify process defects and drive optimization solutions. Yield Enhancement & Stability: Spearhead cross-functional yield improvement programs to ensure production stability and cost-efficiency. Foundry Management: Lead technical teams in collaboration with international major foundries, managing technical alignment, communication, and process transfer. 【Required Qualifications】 Education: Master’s degree or PhD in Electronics, Electrical Engineering, Physics, Materials Science, or a related field. Experience: 10+ years of semiconductor industry experience, with a focus on CMOS logic processes or NVM technologies (eFlash, RRAM, MRAM). Data Insight: Proficiency in data analysis tools (e.g., JMP, Python, or Spotfire) with a proven ability to analyze complex statistical distributions and electrical characteristics. 【Preferred Skills】 Process Transfer Expertise: Successful track record in 〝Copy-Smart〝 process migration, ensuring process consistency and rapid yield ramp-up during technology transfer. BCD Process Expertise: Experience in BCD (Bipolar-CMOS-DMOS) process development or integration; familiarity with PMIC (Power Management IC) optimization. Advanced Node Experience: Proven experience in NVM integration and mass production at 28nm/16nm/12nm or beyond. Design Collaboration: Solid understanding of memory architecture, NVM operation principles, and peripheral circuit design. 【Soft Qualities】 Analytical Thinking: Ability to synthesize complex data into actionable insights and identify root causes of technical anomalies. Proactive Ownership: Courage to transcend functional boundaries and mobilize resources to overcome technical bottlenecks. Effective Communication: Excellence in translating complex engineering issues into clear, actionable optimization strategies for design and process teams.展開 -
Kaohsiung - Test Integration Engineer
面議(經常性薪資達4萬元或以上) 40000元 高雄市楠梓區 工作經歷不拘Job Description - Main contact window with business lines (BLs) to deliver a high quality and manufacturable product for IC test production, meeting or exceeding the required time to market or product cost. - Take lead of new product introduction (NPI) for IC test - To coordinate with related BLs (business line) and align with wafer/final test factories to prepare the product transfer - To improve new product introduction procedure to enable smooth product transfer - To reduce risk and impact to customers and factories, escalation management, e.g. reduce risk and impact by right and timely escalation - To ensure no gap on test tooling availability Facilitate IC test data review and process for planning forecast, take responsibility on test technical data (and improvement plan) in time and accuracy - To follow up test improvement projects, hold lots, progress of New Product Introduction, test buy off…etc. - Process of Test Engineering Notice and Enovia ECO Requirement - Bachelor degree (or above), Engineering background is preferred. - Excellent communication skills (English/Mandarin, TOEIC>600) - Good logic thinking - Be familiar with MS Office tool - 1 yrs experience in IC testing or related working experience is preferred展開
