轉職熱搜工作

1. 新產品/新材料/新製程導入,特殊需求產品生產管控 2. 新產品設計審核,失效模式分析,製程改善,產品良率分析與改善,降低成本研究 3. Process flow / Control plan / PFMEA彙總與管理 4. 各部門間工作溝通協調 5. 應對客戶製程問題相關事項 6. 主管交辦事項 其他條件：有2年半導體製程整合相關經驗 薪資及職務會依學經歷略作調整

想把學校學的機械製圖真正用在工作上嗎？ 正笙科技專注於半導體設備、自動化設備及客製化專用機設計製造，歡迎夥伴的加入。 ▍工作內容 • 使用 SolidWorks 進行3D機構設計與組立 • 機械零件拆圖及加工圖繪製 • AutoCAD 2D圖面繪製與修改 • 圖面整理及發料作業 • 協助業務進行圖面修正與設計變更 • 協助工程師完成設備設計開發

1. 保養日常設備，維持設備正常運作。 2. 控制設備稼動率、增加生產量並維持產能狀況。 3. 判斷設備異常的原因，並排除問題。 1. Perform routine maintenance on equipment to ensure normal operation. 2. Control equipment utilization rate, increase production output, and maintain production capacity. 3. Identify the causes of equipment abnormalities and troubleshoot issues. 4. Must have degrees in Mechanical Engineering, Electrical Engineering and Electronics Engineering or have relate working experiences in those areas.

本公司自豪於融合傳統與現代科技的專業設計製造商！我們是亞洲第一家專注於半導體與光電生產設備的公司，致力於創造高效穩定的產業技術解決方案。我們的產品和服務不僅拉近了科技與傳統產業的距離，更推動了台灣製造技術的突破與創新。如果你熱愛結合創意與科技，這就是屬於你的舞台！ 1. 設計與測試新產品的機構結構，進行結構評估和材料選擇 2. 利用CAD軟體繪製技術圖紙，執行逆向工程與改良設計 3. 跟進專案規劃，與協力廠商共同討論技術方案 4. 協助進行機器測試、組裝操作，並負責報告製作 5. 擔任產品優化專家，處理現場量測與結構改進 6. 分析與解決產品相關技術問題 加入我們，享受以下豐富福利與成長機會： - 三節獎金、加班費、全勤獎金與專利研發獎金 - 週休二日與完整請休假制度，支持工作與生活平衡 - 健全職涯發展體系，包括教育訓練與升遷機會 - 提供員工健檢、員工團保、意外險等多重保障 - 定期員工旅遊、不定期聚餐及完善的伙食津貼 我們誠摯邀請你，成為台灣偉德科技的一份子，共創科技未來！

1.Monitor in-line process parameters, address abnormalities, and make disposition decisions on lots to ensure smooth production flow. 2.Assist in productivity and yield improvement projects through data analysis and process experiments. 3.Support the establishment and maintenance of key process parameters for semiconductor tools. 4.Evaluate new materials, tools, and methods to enhance manufacturing quality and efficiency.

Job Summary AOI is looking for a VCSEL Chip Product Engineer who will be responsible for VCSEL mask layout, process, and test procedure, tracking the operation process of chip products, optimizing the production process and operation process. This role is also responsible for assisting in the failure analysis of related products, and coordinate resource design DOE to confirm the source of abnormalities to help improve product quality. This position will report to the AVP of the R&D VCSEL department. Responsibilities Responsible for VCSEL chip design, mainly responsible for mask layout, process, test procedure, wafer qual and BI procedure, etc Track the operation process of chip products, optimize the production process and operation process Responsible for tracking the abnormality of the chip process, summarizing and analyzing the root cause of the abnormality, and recommending corrective measures Responsible for R&D-related data analysis, feedback information to help optimize product design and manufacturing process, and improve product performance and yield Assist in the failure analysis of related products, and coordinate resource design DOE to confirm the source of abnormalities to help improve product quality Prepare production work instructions and production process documents, implement the implementation of corresponding specifications and give regular feedback Qualifications Bachelor degree or above, or recent PhD graduate, major in optoelectronics, semiconductor materials, physics and other related majors. Familiar with the principle of semiconductor devices, the basic principles of laser chips (VCSEL, EEL, etc.), understand the basic fab process and related test parameters Strong data analysis ability, proficient in using one or more of Excel, JMP, Minitab, AutoCAD and other software is preferred Python, VB, Matlab programming skills are preferred Good learning ability, team spirit, communication and coordination skills

At UMC, your growth is engineered for resilience. We combine long-term stability with non-linear, adaptable career paths, giving you the opportunity to make real impact, while growing with purpose. With our newly expanded Fab and facilities in Singapore, we’re investing in a future-ready workforce equipped to lead in the world’s most advanced manufacturing environments. With us, you can expect at UMC: • Career Resilience: Be part of a stable, values-led company with a track record of supporting our people, even in uncertain times • Growth that Fits You: Explore flexible development paths, cross-functional opportunities, and internal mobility • Meaningful Impact: Help deliver technologies that power everything from AI to smart mobility and sustainable innovation Main Responsibilities You’ll lead work that powers the day-to-day technologies behind modern life, from mobility and connectivity to smart systems and sustainable design. As a Quality Assurance Engineer (Customer) in our team, you will: • Handle customer complaints/ return/ improvement, follow-up the status and monitor the efficiency of progress. • Coordinate customer audits/ QA visits/ surveys and follow-up activities • Handle customer‘s request and the relevant indices of customer satisfaction • Collaborate with cross-functional teams to resolve quality issues and customer requirements to drive product quality improvements

1.Develop and optimize 300mm Silicon Photonics (SiPh) technology platforms, including pluggable modules, co-packaged optics (CPO), and photonic interposer solutions. 2.Collaborate with internal R&D and module engineering teams to define and execute SiPh process flows. 3.Align device and process requirements with customers through technical discussions and solution deep dives. 4.Coordinate with external OSATs and partners for PIC/EIC characterization and packaging integration. 5.Apply DOE, FMEA, and control plan methodologies to ensure robust development and effective risk mitigation across all phases

1.Drive R&D and process integration for 2.5D and 3DIC packaging platforms. 2.Lead the development and qualification of new unit modules and device structures. 3.Establish and validate new process flows in Design Start Modules (DSM) to support custom product platforms. 4.Collaborate directly with customers on product requirements, verification testing, and technical solutions. 5.Apply structured methodologies such as FMEA, DOE, and control plans to optimize performance and mitigate risks.