轉職熱搜工作

Role and Responsibilities • Responsible for GPU cluster uArch specification, PPA (power, performance and area) optimization for industry-leading GPU hardware IP • Collaborate with Arch/Model/SW team, develop cluster level HW specification that meets feature functionality and PPA metrics • Collaborate with Arch/SW/Design team to identify and solve performance bottlenecks, power/area inefficiency issues • Guide IP design process all the way from RTL coding, verification to tape out and post-silicon debug • Proficiently use AI agent and tools to improve RTL coding, function debug and PPA analysis productivity • Execute & deliver to meet milestones/schedules. • Analyze and debug code pre-silicon and post-silicon issues. • Analyze and influence future GPU architectures. • Construct reliable & trustable relationships across teams internally & externally. • Delivering best in class GPU IP for mobile, automotive, laptop and ASIC applications

1. TOP 設計包含：微架構、設計、模擬、測試 - DFT top, PAD top 2. TOP 和感測器的整合和模擬包含： - eFUSE - PVT 感測器和 aging 感測器 - 整合 IO 到晶片中並滿足客戶需求 3. 測試流程、環境和程式開發

- This position is for an SoC Architect, responsible for evaluating the technical feasibility and architectural direction of new products prior to project kickoff. - The role requires close collaboration with business teams to clarify market needs and product requirements, as well as cooperation with engineering teams to explore the competitiveness and feasibility of various SoC architecture options. - The architect will integrate cross-functional inputs to define the optimal system-on-chip design architecture, serving as the foundation for subsequent product development. - 此職缺為 SoC Architect，負責於專案啟動前進行產品的技術可行性與架構方向評估。 - 需與商務單位合作，釐清市場需求與產品規格；並與各工程團隊協作，探索不同 SoC 架構方案的優劣與競爭力，評估技術風險與可行性。 - 最終需整合跨部門意見，制定最佳化的系統晶片設計架構，作為後續產品開發的基礎。

1. USB3 Controller Maintainess/Development 2. Leading the new USB3 design team 3. Short term =＞ Handle the USB3 Controller for different projects and adding new features. Long term =＞ Co-work with USB4 team to co-develop the next gen USB4 controller

1. 分析AI應用業務落地需求，與相關部門和用戶溝通，了解系統需求和功能 2. 分析和解決系統運行中的問題，找出系統瓶頸 (包含模型推理及應用pipeline) 3. 持續改進系統性能，提出優化建議和實施方案 4. 與其他工程部門充分溝通，共同找出可行優化方案

1. Bus and Architecture design and RTL implementation of Smartphone chipset 2. ASIC and Smartphone SoC and mobile computing platform design. 3. System bus and mobile peripheral designs 4. SoC system performance analysis

負責設計並優化數位相機及影像信號處理領域之IC，與演算法團隊協作，共同開發領先業界的影像處理解決方案，應用於智慧型手機、平板、車用及家庭娛樂等高成長市場。 工作職責 : - 與演算法工程師協作，設計高效能影像信號處理（ISP）/電腦視覺（CV）電路 - 提供優化硬體方案，達成IC設計「黃金三角」：最小矽面積、極低功耗、最佳影像品質 - 負責RTL設計、模擬、驗證、邏輯合成與整合流程 - 參與專案系統架構與技術研討，提出創新設計方案 - 支援產品跨部門整合及技術溝通

我們正在招募一位熟悉生成式AI技術且擅長前端數位設計的工程師。本職缺專注於運用前沿商業或開源 LLM，於RTL設計、RTL優化、simulation testbench生成、formal testbench 生成等數位設計流程，開發提升設計自動化與效率之 AI 演算法。您將與RTL設計工程師、DV驗證工程師與AI專家合作，共同推動數位設計智能化。另外, 您也會研讀期刊,開發並評估效果, 並撰寫技術文件,專利或paper投稿.

1. AI處理器和相對應周邊IP/系統驗證環境開發 2. 從IP到系統的功能驗證和自動化環境 3. 開發低耗電和效能的測試 4. post-sillicon除錯 5. emulator 環境建立

The candidate will conduct functional verification of the RF transceiver circuit design at various stages—from individual circuit blocks to the complete system operation—using behavioral models during the design process.