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資深數位設計工程師
月薪 40000元 新竹縣竹北市 3~4年工作經驗1. 依據系統規格需求,制定數位IC的硬體架構及功能清單,確保設計明確且高效。 2. 與架構設計、物理實現及晶片驗證團隊密切配合,完成符合性能、功耗及時序要求的設計。 3. 負責系統晶片(SOC)的RTL/SDC/UPF設計開發,確保設計符合規格並提供最佳解決方案。 4. 進行數位電路的時序分析與電路功能驗證,確保晶片功能完整且可靠。 5. 參與數位IC設計專案的全流程,包括從規劃、設計到流片後分析,提供全面技術支持。 6. 熟悉電子設計自動化(EDA)工具,負責設計流程的驗證及測試,確保產品品質與效能。 7. 定期分析技術問題並提出解決方案,同時積極參與新技術研究與應用。 8. 協助技術文件的撰寫與跨部門溝通,並提供設計階段的技術諮詢與支援。 我們正在尋找具有熱忱與專業能力的你,來共同參與專業IC設計的挑戰性專案。我們的核心專注於實現精密設計與創新技術的融合,若你對數位IC設計有豐富經驗與興趣,歡迎加入我們的團隊,成就精彩的職業未來!立即投遞履歷,期待您的加入!展開 -
GPU實體設計工程師
面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘Responsible for physical design and development activities of MediaTek’s Ghz ARM/Imagination-based graphics processors, AI processors and neural network DS. Involve in activities encompass physical design and analysis of complex and timing-critical graphics processor AI processors and neural network DSP. Technical disciplines include Physical Implementation (floor-planning, place and route, RC extraction, timing and power optimization) & signoff (DRC, LVS, STA, PI).展開 -
資深工程師
面議(經常性薪資達4萬元或以上) 40000元 新北市樹林區 3~4年工作經驗【嵌入式電子電路系統設計】 - 主導嵌入式系統的硬體架構設計,包含 MCU/FPGA 選型、高速訊號佈線(SI/PI)評估與優化。 - 執行類比與數位電路設計、模擬驗證及 PCB Layout 審查,確保設計符合低功耗與高效能需求。 - 解決電磁相容性(EMC/EMI)問題,確保產品符合國際安規標準。 【儀錶與電子量測產品開發】 - 應用精密電子量測技術(如 A/D、D/A 轉換、訊號調理)於儀表產品開發,提升量測精度與穩定性。 - 導入新Sensor IC 以延伸產品型號。 【產品系統規劃與技術管理】 - 負責新產品從需求分析(Requirement Analysis)到規格定義(Spec Definition)的系統層級規劃。 - 協調跨單位(韌體、機構、製程)技術溝通,確保開發流程與時程符合商業計畫。 - 建立生產標準作業程序(SOP),進行設計文件審查與技術經驗傳承。 為什麼你該加入群特科技? •【產業優勢】相較於一般消費性電子,工業用儀表產業受景氣波動影響較小。 •【發展空間】本職缺為研發團隊核心要職,公司具備完善的專案主導與職涯晉升管道。展開 -
資深FPGA開發工程師(新竹/土城)
面議(經常性薪資達4萬元或以上) 40000元 新北市土城區 3~4年工作經驗FPGA-數位電路研發/整合/驗證 工作內容包含: 1. SoC FPGA架構設計 2. SoC FPGA整合 3. 數位電路設計 4. 數位電路驗證 5. 系統平台驗證展開 -
數位IC設計高級工程師
面議(經常性薪資達4萬元或以上) 40000元 桃園市桃園區 1~2年工作經驗1. 參與影像處理相關 SoC/ASIC/FPGA 系統之數位電路設計與 RTL 撰寫。 2. 負責模組級功能設計、模擬與驗證,確保設計邏輯與時序穩定。 3. 實作影像處理演算法(如 Scaler、Noise Reduction、3D Image、ISP)於硬體架構中。 4. 協助高速傳輸與記憶體介面(如 DDR Controller、MIPI、USB2.0/3.x)與系統總線設計整合。 5. 與韌體/軟體/硬體工程團隊合作,完成整體系統之功能驗證與效能調校。 6. 具備良好團隊合作與問題分析能力,能獨立作業與配合開發時程進度。 【必要條件】 * 熟悉 Verilog / VHDL 等 RTL 設計語言,具 FPGA 或 ASIC 實務開發經驗。 * 熟練 C / C++,具備將演算法轉化為硬體架構的實作能力。 * 熟悉影像處理模組設計(如 Scaler、Noise Reduction、3D Depth、ISP)。 * 熟悉高速傳輸與通訊介面(如 DDR、MIPI、USB、SPI、I2C)。 * 具 SoC 系統架構理解與模組整合實務經驗。展開 -
硬體研發工程師
面議(經常性薪資達4萬元或以上) 40000元 台中市大雅區 工作經歷不拘1.類比/數位電子電路設計, 崁入式系統韌體撰寫 2.設計功能驗證規劃與執行 3.新產品技術研發 4.有實務設計經驗可獨立作業佳 5.薪 $40,000以上依能力敍薪展開 -
資深嵌入式系統軟體工程師
面議(經常性薪資達4萬元或以上) 新北市三重區 5~6年工作經驗負責嵌入式 Linux 系統軟體設計和 MCU 韌體開發工作 1. 收悉 Linux 軟體開發工作能與硬體工程師、產品經理及其他團隊溝通,從各種角度提供建議,共同提升產品品質與開發效率。 2. 整合 MCU 與周邊 IC 的驅動程式,具有產品品質維護以及解決客戶問題的能力。 【我們需要這樣的你】 - 有七年以上 MCU/ Driver 的開發經驗。 - 精通 C/C++ 語言、MCU 相關開發環境及除錯工具。 - 熟悉各種常見硬體介面 (I2C、SPI、UART、I2S…)的控制方式。 - 基礎的硬體電路量測及分析能力。 - 有行車記錄器或者影像類設備的開發經驗尤佳。 【加分,但不是必要】 - 其他數位音效產品的開發經驗。 - 熟悉 Bluetooth、USB 等數位傳輸協定。 -了解 LVDS、AHD 影像傳輸原理。 - 有 AI 算法程式開發經驗。展開 -
連接器研發工程師/高頻高速連接器設計工程師 Connector R&D Engineer / High Speed Connector Design Engineer
面議(經常性薪資達4萬元或以上) 40000元 台北市大安區 3~4年工作經驗【公司介紹】 喬訊科技股份有限公司專注於高頻高速、高電流連接器產品之研發、製造與全球市場開發,產品應用涵蓋 AI Server、資料中心、工業自動化、電動車、機器人、通訊設備與高階電子設備等領域。公司初期將建立核心研發團隊,從產品設計、機構開發、材料選用、模具導入、樣品驗證到量產轉移,打造具國際競爭力的連接器產品線。 喬訊科技的目標,不只是成為一家連接器公司。我們希望建立具全球競爭力的高速傳輸與高功率互連技術平台,服務 AI、資料中心、工業自動化、機器人及新能源產業。 未來五年,我們將以台灣研發中心為核心,逐步建立中國製造基地、美國市場據點及新加坡區域營運中心。如果您期待的不只是工作,而是參與一家企業從 0 到 1、從台灣走向世界的成長歷程,我們誠摯邀請您加入。 本職位為喬訊科技創業初期核心職位,將直接參與公司產品策略、市場布局及全球營運體系建立。優秀人才未來將有機會晉升核心幹部並參與公司長期激勵與持股計畫。 我們不是在找員工,而是在尋找未來一起打造國際級連接器品牌的創業夥伴。 【工作內容】 1. 負責高頻高速、高電流連接器產品之機構設計與開發。 2. 依據客戶需求、應用場景與產品規格,進行連接器結構設計、材料選用與製程評估。 3. 使用 3D CAD 軟體進行產品建模、2D 工程圖、公差分析與設計文件建立。 4. 參與新產品開發流程,包括概念設計、樣品製作、測試驗證、設計修正與量產導入。 5. 與模具、沖壓、射出、電鍍、組裝、品保及供應鏈團隊協作,確保產品可製造性與品質穩定性。 6. 協助執行 DFMEA、設計審查、可靠度測試、失效分析與工程變更。 7. 支援業務與 FAE 團隊進行客戶技術溝通、規格確認及客製化設計。 8. 協助建立公司連接器產品標準、設計規範、測試規範與技術資料庫。 9. 針對高頻高速產品,協助 SI 工程師進行阻抗、串擾、插入損耗、回波損耗等設計優化。 10. 參與專利佈局與新技術平台開發。 11. 需配合供應商、製造基地或客戶端出差。 【薪資待遇】 依能力與資歷面議。具連接器產業資深經驗者另議。 除固定薪資外,公司提供: ■ 年度績效獎金 ■ 專案獎金 ■ 新產品開發獎勵 ■ Design Win 獎勵 ■ 業績達成獎勵 ■ 年度盈餘分紅制度 ■ 關鍵人才長期激勵計畫 ■ 未來員工持股計畫(ESOP) 依個人及團隊績效表現核發。 【教育訓練與人才培育】 公司重視人才培養與長期發展,提供: ■ 新人培訓計畫 ■ 專業技術訓練 ■ 專案管理訓練 ■ 領導管理課程 ■ 海外市場實戰培養計畫 優秀人才將有機會參與美洲、歐洲、新加坡、東南亞及大中華區市場開發專案。展開 -
Digital Design and Automation Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=532&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: Front-end to back-end large scale digital circuit design for system-on-chips and 3DICs, responsible for designing with the state-of-the-art process technologies and developing corresponding CAD flows that explores cutting edge design methodologies and latest EDA tools, either for internal first-in-the-industry testchips or leading customer’s products Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Design and Technology Platform Engineer (DTP)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19034&source=1111&tags=domestic+campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. Responsibilities: At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. 1. Physical Designer The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, PNR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. The candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements. 2. Standard Cell Engineer (1) Pathfinding of library characterization for leading edge tech nodes. (2) Support industrial standard library kits generation and QC. (3) In-house library generation flow and/or utility development. (4) RC parasitic extraction analysis and APR related analysis. 3. Layout Engineer (1) IC layout for advanced technology (Std. cell/Memory/AMS/IO). (2) Layout structure development for new technology. (3) Pathfinding for new technology development. (4) Customer engagement and layout support. (5) Design and technology co-optimization (DTCO). (6) AI and automation for layout and physical design. 4. System and Chip Design Solutions Development Please refer to the Link: https://careers.tsmc.com/zh_TW/careers/JobDetail?jobId=516 5. FE design & DFT (1) Test chips development for advanced nodes, including physical design (APR), logic synthesis and DFT (Scan insertion + ATPG). (2) Design flow development for test chips design, which requires the programming skills, Tcl, Python, C-shell scripting etc. (3) Technology benchmarking for PPA evaluation of the advanced nodes. (4) DTCO (Design & Technology Co-Optimization) pathfinding and development. 6. SRAM Engineer (1) SRAM design in advanced nodes for mobile, high-performance computing, IoT, automotive applications. (2) RRAM/MRAM, emerging memory development. (3) In memory computing research and development. 7. Design Flow/Methodology (1) Advanced technology process design kits (PDK) and tech files (DRC, LVS, RC, etc.) development and technical support. (2) Advanced technology design development flow development and technical support. (3) Automation program development to support design kits and flow development productivity/quality. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開
