轉職熱搜工作

1. Optimize 6G/5G modem architecture and associated hardware/software flows in aspects of system performance/power/area (PPA) to improve product competitiveness. 2. Develop architectural simulation, system-level modeling, and analysis platforms for modem baseband system performance, low-power optimization, and hard real-time (HRT) latency analysis. 3. Collaborate closely with domain architects to deliver quantitative reports based on simulation data, driving key architectural decisions. 1. 優化 6G/5G 解調架構及相關的硬體/軟體流程，提升系統效能／功耗／面積（PPA），增強產品競爭力。 2. 開發架構模擬、系統級建模與分析平台，用於評估基帶系統效能、低功耗優化與硬實時（HRT）延遲分析。 3. 與領域架構師緊密合作，根據模擬數據產出量化報告，推動關鍵架構決策。

As an Digital IC Design Intern, you will collaborate with our researchers and worldwide colleagues and develop applications and algorithms that make a real difference in everyday devices. Your developments would significantly enhance the experience of numerous end users across our product range.

我們正在尋找一位同時精通 AI 與晶片設計的專家，能夠將人工智慧技術應用於晶片設計流程，提升生產力與產品品質。此職位需要具備 IC 設計知識，以及機器學習／生成式 AI 的專業能力，能夠主動發掘並定義創新機會，設計可行且穩定的解決方案，並優化設計流程。若您對晶片設計流程優化及數位 IC 設計有相關經驗，將會是加分項目。 我們歡迎對跨領域創新充滿熱情、喜歡處理複雜資料並挖掘洞見、勇於挑戰的工程師或資料科學家加入我們的小型多元團隊。您將透過快速迭代，為 MediaTek 的晶片設計流程提供最合適的 AI 解決方案。 軟實力方面，您需具備主動積極的態度、持續學習與適應新知的能力、優秀的溝通技巧，以及跨部門協作的能力。硬實力方面，您需擁有扎實的程式設計能力，並具備足夠的 IC 設計與 AI 技術知識。

1. 顯示子系統設計(架構, RTL和整合) 2. 顯示模組IP設計 3. 顯示界面設計 (如. MIPI-DSI) 4. 低功耗顯示設計 5. 顯示系統優化 (PPA, ecosystem SOC/DDIC/LCM) 6. 顯示技術開發 (手機, 車用, 智能眼鏡等) 1. Familiar with IC Digital Design, RTL Coding and Integration Flow 2. Better to have Multimedia or Display Related Experience 3. Better to have Low Power Design Experience 4. Better to have Integration Experience 5. Better to have Display Eco-system Experience

1.Digital design (RTL design, Synthesis, integration, verification) 2.SoC Chip design, integration 3.Familiar with VLSI design flow is a plus

1. Processor core, cache and peripheral verification 2. Verification flow and methodology 3. Advanced tool and verification technology survey

1. CPU system design and performance analysis 2. System bus architecture and integration 3. IP and system verification

1. Contribute to the development and enhancement of design methodologies for 2.5D and 3D IC advanced package design. 2. Lead the development of new design and signoff flows for physical, electrical, and thermal quality assurance. 3. Support package design teams in defining a tool roadmap for advanced package design. 4. Contribute to interposer designs, advanced package designs, and test vehicles for the product design roadmap and feasibility. 5. Represent the Package design team in customer engagements for advanced package designs.