轉職熱搜工作

我們正在尋找一位同時精通 AI 與晶片設計的專家，能夠將人工智慧技術應用於晶片設計流程，提升生產力與產品品質。此職位需要具備 IC 設計知識，以及機器學習／生成式 AI 的專業能力，能夠主動發掘並定義創新機會，設計可行且穩定的解決方案，並優化設計流程。若您對晶片設計流程優化及數位 IC 設計有相關經驗，將會是加分項目。 我們歡迎對跨領域創新充滿熱情、喜歡處理複雜資料並挖掘洞見、勇於挑戰的工程師或資料科學家加入我們的小型多元團隊。您將透過快速迭代，為 MediaTek 的晶片設計流程提供最合適的 AI 解決方案。 軟實力方面，您需具備主動積極的態度、持續學習與適應新知的能力、優秀的溝通技巧，以及跨部門協作的能力。硬實力方面，您需擁有扎實的程式設計能力，並具備足夠的 IC 設計與 AI 技術知識。

1. Contribute to the development and enhancement of design methodologies for 2.5D and 3D IC advanced package design. 2. Lead the development of new design and signoff flows for physical, electrical, and thermal quality assurance. 3. Support package design teams in defining a tool roadmap for advanced package design. 4. Contribute to interposer designs, advanced package designs, and test vehicles for the product design roadmap and feasibility. 5. Represent the Package design team in customer engagements for advanced package designs.

1. Chip integration and quality check 2. DFT insertion, verification and scan coverage analysis 3. Synthesis and PPA analysis

1. CPU system design and performance analysis 2. AMBA System bus architecture and integration 3. IP and system design and verification

1. Familiar with chip digital design flow, including RTL integration, simulation, STA, power analysis 2. Basic knowledge of analog design 3. Mixed signal design experience is a plus. 4. SoC architecture exploration and performance analysis experience is plus. 5. Post-silicon mass production experience ((Ex: DFT, CP, FT)) is a plus. 1 . 熟悉數位IC整合流程, 包含RTL, 模擬, 時序分析, 功耗分析, 2 . 具類比IC設計的基本知識 3. 混和訊號IC設計經驗是加分項 4 . 系統架構分析經驗是加分項 5 . 具IC量產相關經驗(Ex: DFT, CP, FT)是加分項

1. Make test pattern plan to cover system bring-up for MP (CP/FT, system test, DVT, HQA, correlation, DPPM reduction) 2. Debug post-silicon issue to identify design weakness and solution finding 3. Correct post-silcion measurement vs. pre-silicon simulaiton, including process, performance, power.

1. Direct manager and project lead 2. Cloud data center product 3. DFT task force 4. short term: top DFT flow implement and signoff long term: DFT/test mode planning and new tech development.

- Optimize GPU performance, area/power for representative workloads (graphics and compute) from the perspectives of memory sub-system, low-power design/policy and implementation strategy. - System modeling framework to simulate hardware with different accuracy/throughput tradeoffs at different stages of the design; supervise Performance/Power/Area investigation/validation and facilitate architecture/design decisions

Responsible for GPU HW development environment tool/flow maintenance and database (perforce) management. Effectively support DE/DV smooth development.