轉職熱搜工作

Job Overview: 1.xPON / Switch FAE is required to be able to code, compile, collect & analyze logs and debug; support customers technically & coordinate technical support with engineering team in HQ. 2.This role would require travelling on-site to customer‘s office, lab, production floor & factory (Mumbai, Delhi NCR etc.). You would also be required to attend and facilitate training sessions, & exhibitions. 3.The job would require extraordinary communication skills to be able to understand and communicate with non-English native speakers. Responsibilities: 1.Co-work with Indian system developers to develop an xPON products [GPON/EPON/XGS-PON/ N-GPON]. 2.Troubleshooting issues during the development and manufacturing stage for the customers. 3.Provide the guide to customer for develop features in Linux kernel driver or system level features (e.g. LED/GPIO control, DHCP, IP-tables module, WEB) on the GPON ONU. 4.Be able to work on and resolve issues in many diverse areas of the system (From low-level kernel mechanisms to high-level application features and co-work with Realtek HQ RD) Qualifications: 1.MS/BA/BS in Computer Science, Computer Engineering, Electrical Engineering, or related field, or equivalent experience. 2.Proficient in C, shell scripting, and router web design. 3.Knowledge of L2/L3/xPON networking protocols and features such as Firewall, DHCP, DNS, VPN, PPPoE, QoS, and HWNAT engine. 4.Experience working with Linux systems. 5.Preferred skills include:u-boot, flash partition, file system, Makefile, build systems. 6.Debugging and development/testing experience with interfaces like MDIO, RGMII/SGMII/QSGMII, DDR, UART, I2C, GPIO, and FLASH. 7.Familiarity with Realtek GPON chip development. 職務類別 FAE工程師、業務支援工程師

工作項目： 1. 客訴RMA處理 2. 故障分析(EFA/PFA) 2. 重大客訴分析客戶窗口 3. 產品DPPM改善提升 4. 品質改善CIP專案規劃及推動 5. 記憶體廠商品質管理(驗證/良率/變更/稽核/異常處理) 應徵條件： 1. 學士以上，電子/電機/物理/化學等相關科系畢業者佳 2. 具7年以上具記憶體製造商產品工程或品管經驗經驗者佳。

工作項目： 1. 負責安防系統(門禁/監視/車辨等)整體解決方案之專案規劃、架構設計、平台建置與功能整合 2. 根據各場域需求，協助系統選型與新興技術導入建議，確保系統的可擴展性和相容性​ 3. 系統運維與優化，協調各項資源，監督日常運營，確保KPI達成率 4. 規劃安防系統數據分析、評估潛在安全威脅 5. 結合數位轉型與應用，AI辨識模型與平台串接（如AI、IoT、車牌辨識、生物辨識）​ 6. 法規/標準研究，資通合規要求 7. 撰寫技術標準文件SOP 應徵條件： 1. 碩士以上電信工程、電控工程、電子工程、資訊工程、通訊工程相關科系畢業為主 2. 熟悉 操作Office、AutoCAD、Visio等繪圖與規劃工具​ 3. 熟悉 Windows / Linux操作，VM/Storage虛擬化平台操作經驗​ 4. 具3年以上下列經驗者為佳： • 熟悉安防系統、弱電建置或大型IT系統設計經驗 ​• 熟悉門禁、監視系統（CCTV/NVR/VMS）、車牌辨識（LPR） ​• 熟悉AI影像分析，具平台整合或IoT專案實務經驗 ​• 基本資安意識與風險處理能力​ • 基本專案管理、規劃能力，良好技術文件撰寫能力​ 相關經驗者為佳。

Key qualifications: 1. MS degree or above with EE or CS background 2. Familiar with SystemVerilog and Verilog 3. Exposure to OVM/UVM/VMM methodology 4. Exposure to constrained-random based verification environment 5. Exposure to create coverage model and drive coverage closure in including code/functional coverage. 6. Be able to develop a test bench from scratch 7. Hands on working experience on unit/block/full-chip level verification 8. Good communication skill 9. Leadership/management experience is a plus. Job descriptions: 1. Plan the verification strategy for SOC projects 2. Hands-on verification task of some of the units 3. Work closely with the design teams. 4. Drive the verification team, problem-solving on day-to-day works 5. Provide the measurable metrics for project leads and upper management. 6. Bug/coverage trend identification. Foresee the possible issues and plan for them. (MD17C0031)

工作項目： 1.Unit-test for Image release 2.協助IOP Test 3.協助工程端問題複製與驗證 應徵條件： 1. 學士以上，相關科系畢業為主 2. 熟悉 Linux、Office 3. 熟悉 None 4. 無工作經驗可，對消費型電子及影音娛樂測試有興趣者。 5. 具有相容性及基本消費型電子測試經驗者佳。

工作項目： 1. Responsible for product line quality throughout the development phases, from planning to mass production. 2. Product development quality (APQP) assurance including joint reviews, coordinator of quality issues to closure and fan-out. 3. DFMEA assurance. 4. Host continual improvement program and monitor the progress on a regular basis. 5. CAR and RM (risk management) review and tracking. 6. Process audit and action tracking. 7. Project handling. 應徵條件： 1. Bachelor or above of science degree in Electrical/Electronic Engineering. 2. Specialization or related experience in the area of system-level Hardware / Firmware / Software development with a minimum of 5 years of work experience. 3. Experience in project management is a plus. 4. Ability to work independently and in a team-based environment. 5. Good written and verbal communication skills with both customers and internal teams. 6. Experience from 1st tier ODM company is highly preferred. 7. Experience with ASPICE, Functional Safety, Cyber Security is a plus.

工作項目： SSD專案 Leader，帶領團隊開發 SSD產品。 應徵條件： 1. 碩士以上; 電機工程、電信工程、電控工程、電子工程相關科系畢業為主。 2. 具5年以上相關工作經驗： (1) 精通 SATA interface protocol. (2) 精通 PCIe interface protocol. (3) 精通 NAND flash protocol. (4) 精通 LDPC演算法。 (5) 精通 Digital design流程或具其他相關經驗者為佳。

工作內容： 1.負責網路IC的架構設計與安全分析 2.參與embedded secure boot的開發與驗證 3.協助客戶解決網路安全問題 4.進行車用網路安全相關的測試與驗證 5.瞭解網路攻擊技術與防禦方法 6.熟悉物理攻擊與防禦技術 7.進行滲透測試 應徵條件： 1.具有網路IC架構設計經驗 2.具有embedded secure boot開發與設計經驗 3.具有車用網路安全相關經驗，例如 ISO 21434、AUTOSAR 4.具有網路攻擊相關技術，例如 DoS、防火牆等 5.具有物理攻擊(physical attack)相關技術 6.具有滲透測試(penetration testing)相關技術

工作項目： 1、ADC design 2、DAC, TX class AB output, line driver design 3、Automotive IP development 4、Automotive project leader

工作項目： 1. SOC integrator! A challenging job for integrating the designs from over 100 digital designers and tens of analog designers. A challenging job of using deep submicron process. 2. Building & Improving the standard environment for digital designers to run front-end flow, such as synthesis, STA analysis, linting, and so on. 3. Cooperating with APR designers for backend timing closure. 4. Block / Whole-Chip CTS (Clock-tree Synthesis) analysis and improvement. 應徵條件： 1. 碩士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程等相關科系畢業為主。 2. 熟悉 verilog, verdi, STA, synthesis. 3. 具 CTS(Clock tree synthesis) Design/Debug經驗者尤佳。 4. 會寫 script如 perl者更佳。 5. 具六年以上相關工作經驗。