轉職熱搜工作
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【2027 TSMC RDSS & AO】Advanced Packaging Technology Development (APTD)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22577&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: As a member of the APTD (Advanced Packaging Technology Development) team, you will initiate novel package concepts, own and drive advanced package development, new product package structure and configuration optimization. You will be responsible for 3DFabric technology research and development. Including InFO, CoWoS, COUPE and SoIC process/integration development for customer‘s variety applications. 1. Integration (1) Develop advanced 3DIC (InFO, CoWoS, COUPE and SoIC) processes and sustain baseline. (2) Package level reliability, failure mode analysis and improvement plan. (3) Customer technical interface, new tape out and lot handle. (4) Handover developed technologies to manufacturing groups for production. 2. Module Development (1) Be responsible for CVD/PVD/CMP/Wet/Etch/Polymer/Bonding/Thinning/Joint/Saw/Trim/Material module development for 3DIC projects. (2) New technology, materials survey, and process improvement on 3DIC package structures. (3) Process development and tool transfer to mass-production development. 3. Simulation (1) Conduct risk assessment and provide mitigation plan for IC packages by simulation and experiment. (2) Practice FEM and DOE in problem solving and path finding particularly on packaging. (3) Continue improvement in simulation methodology, material modeling and script automation. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
Technical Manager for Numerical Analysis/Methodology Development
面議(經常性薪資達4萬元或以上) 40000元 新竹市 10~11年工作經驗【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址:https://careers.tsmc.com/careers/JobDetail?jobId=7197&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Lead a team of highly motivated R&D engineers to develop numerical analysis methodology to support novel 3DIC integration technology development. 2. Support the existing in-house simulation and analysis framework to deliver reliable, accurate and effective results to customers. 3. Collaborate with EDA/CAD software vendors to solve problems emerged in advanced semiconductor and 3DIC technology. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2027 TSMC RDSS & AO】Information Technology (IT)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=22586&source=1111&tags=AO+2027_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: You will be tasked with one or more of the following responsibilities: 1. Development and integration of Factory Automation Systems. 2. Development and integration of Advanced Technology. 3. Development and integration of Office Automation Systems. 4. Development and integration of Cloud Computing, Kubernetes or Big Data Analytics Systems. 5. Build/Development Scalable Platform for managing container applications. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【AI Server / Rack】SIT(系統整合測試)
面議(經常性薪資達4萬元或以上) 40000元 桃園市龜山區 3~4年工作經驗【職缺亮點】全新台灣NPI中心建置之核心測試工程團隊,具備高專案能見度與職涯發展舞台。 1. SIT測試環境建置與維護:負責系統整合測試(SIT)環境之規劃、搭建與日常運維管理,確保測試平台之穩定度與高可用性。 2. 測試計畫與案例規劃:依據產品規格制定SIT測試計畫、設計結構化測試案例(Test Cases)與明確的驗收標準(Acceptance Criteria),以確保驗證範疇之完整性。 3. 測試執行與異常缺陷追蹤:執行系統整合測試作業,深入分析測試結果並精準定位異常,落實缺陷追蹤與閉環管理(Closed-loop Management)。 4. 跨團隊介面相容性驗證:協同研發(R&D)與製造團隊,共同驗證系統間之介面相容性(Interface Compatibility),確保軟硬體整合與訊號傳遞之順暢度。 5. 測試文件編制與技術報告:負責測試規格書與標準文件的制定與維護,並編制詳盡的測試報告,為產品釋出與質量評估提供客觀的數據決策支持。展開 -
(行政處) 資訊軟體人員
月薪 40000~45000元 高雄市苓雅區 1~2年工作經驗需求條件: 1. 可視情況,於高雄苓雅辦公室或永安廠區辦公。 💻 充滿熱情的資訊軟體神隊友,我們正在找你! 你喜歡挑戰解決各種系統難題嗎? 想成為公司數位轉型的關鍵夥伴嗎? 歡迎加入我們,一起讓工作流程變得更順暢!🌟 ✨ 加入我們,你將負責 1. 擔任公司ERP系統與電子發票的操作顧問,即時解決同仁的問題 2. 進行ERP及資料庫系統的日常健康檢查與維護,確保穩定運行 3. 維護公司官網資訊與BPM及OA電子簽核表單,確保數位資訊零時差 4. 協助處理各項資訊行政事務並完成主管交辦的任務 在這裡,你的專業將讓所有同仁的工作效率大幅提升! 已經準備好要發揮你的資訊專才了嗎? 我們非常期待你的加入,一起創造更高效的辦公環境!🚀展開 -
資訊專員(系統程式開發)
面議(經常性薪資達4萬元或以上) 40000元 台南市東區 5~6年工作經驗1、系統程式開發。 2、管理資訊系統之功能維護、擴充。 3、程式管理、資料庫管理。 4、系統功能文件建立、管理。 -
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BPD1-資深軟體研發工程師(SONiC / Network OS)
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 3~4年工作經驗1. 負責 SONiC(Software for Open Networking in the Cloud)核心功能開發與維護。 2. 開發網路服務模組(Daemon)並整合 SAI 與 Switch SDK。 3. 參與 SWSS、Syncd、OrchAgent、Redis 等核心元件設計與系統整合。 4. 分析並解決 Memory Leak、Deadlock、多執行緒等系統問題。 5. 優化路由收斂、事件處理效能及系統穩定性。 6. 執行 Code Review、單元測試及開源社群版本整併與維護。展開 -
BPD1-光模組測試工程師 / Optical Transceiver Test Engineer
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 1~2年工作經驗1. 光電特性與傳輸效能測試:負責高速光纖收發模組(10G/25G/100G/400G 等 SFP+/SFP28/QSFP28/QSFP-DD)及 DAC/AOC 線纜之光學與電氣特性驗證。 2. 高速儀器操作與分析:熟練操作示波器(DSO)、光眼圖儀(Eye Diagram)、光時域反射儀(OTDR)、誤碼率測試儀(BERT)、光功率計及光譜儀,執行訊號完整性(SI)與眼圖分析。 3. 系統相容性與互通性驗證:將光模組導入交換器(Switch)及伺服器(Server)設備,驗證 DDM/DOM 監控數值讀取、I2C 通訊、Link Up 狀態、長距離傳輸封包丟包率與高低溫環境壓力測試。 4. 自動化測試規劃與執行:協助撰寫或維護自動化量測腳本(Python 或 LabVIEW 等),加速測試流程並提升良率監控效率。 5. 不良品分析與報告產出:整理測試數據、撰寫驗證報告(Test Report),針對相容性異常或不良品(RMA)進行初部故障分析(FA)並協助對接原廠或研發團隊排查問題。展開 -
品管測試人員-115-3
月薪 42000元 台北市南港區 1~2年工作經驗主要工作內容 1.辦理金融資訊系統功能、整合及量能測試作業。 2.辦理金融機構及合作單位上線驗證測試作業。 3.管理及追蹤測試題議、辦理例行回歸測試作業。 4.開發測試工具及維護自動化測試作業。 ※必要資格條件 1.學歷:國內、外大學(含)以上學校畢業,且已取得學士學位(畢業)證書。 2.須提供在學成績單(大學/碩士)。 3.具備1年以上程式設計或軟體測試經驗(單一機構未滿六個月工作經驗,不予採計)。 ※口試加分條件 1.資訊或理工科系者。 2.資訊類認證證明文件。 3.具金融相關領域經歷。 ※ 一律經由研訓院官網報名,逾期及其他報名方式,恕不受理。 ◎求才網站:金融研訓院官網求才專區 ◎報名連結:https://svc.tabf.org.tw/115fisc07 ◎報名時間:115年10月29日(星期四)10:00 至 115年11月18日(星期三)17:00止 簡章各項內容若有變更,以台灣金融研訓院及財金資訊股份有限公司網站最新公告為準。展開
