轉職熱搜工作

1. Own the top-level integration of internal and third-party IPs into SOC or FPGA platform. 2. Ensure interface compatibility, clock/reset domain correctness. Resolve integration issues including timing, CDC/RDC, and floorplan. 3. Work closely with architect to define specification, support physical design team through synthesis constraints and integration guidance, partner with firmware and validation teams to ensure smooth bring-up and validation.

1. Serdes/High speed interface related PHYD IP architecture planning. 2. Serdes/High speed interface related PHYD IP RTL coding. 3. Serdes/High speed interface related PHYD IP front-end and back-end integration. 4. Co-work with MAC design team and DV team for IP verification. 5. Co-work with Analog design team for PHY co-simulation.

1.數位電路設計 2.多媒體架構與電路設計 3.多媒體系統整合 1.Digital IC Design 2.Multimedia Architecture and Design 3.Multimedia System Integration

1. AI processor subsystem架構與RTL設計 2. AI processor subsystem整合驗證與介面設計 3. AI processor subsystem效能與低功耗設計與分析

開發手機/平板SoC模擬及分析平台， 從系統效能，功率消耗，溫度控制...等多重面向分析產品競爭力， 進而從系統角度優化硬體架構及軟體控制策略。

1. 進行射頻系統性能驗證工作，確保測試結果符合測試規範需求。 2. 與演算法及軟體部門合作開發與PA相關的省電技術。 3. 使用DPD技術改善PA的線性度與效率。 4. 支持重要客戶完成工廠校準時間的優化工作。 5. 撰寫高品質的技術文檔，並交給客戶支援單位以執行客戶支持。

根據不同專案使用的各種CPU架構: * Function validation * Margin characterization & validation * System stability validation * Power/VF/Benchmark characterization * Customer issue resolve

1. Responsible for high-speed UCIE development, including architecture definition, verification, and customer support (familiar with architecture, firmware, debugging, optimization, and testing tasks). 2. Define architecture and specifications through simulations. ( Matlab ) 3. Develop test automation. 4. Collaborate with the team to establish system prototypes and optimize performance. 5. Achieve product integration for clients and support mass production.