轉職熱搜工作

IC 測試開發工程師 負責高速數位、類比晶片測試程式開發(AP/compu AI/ASIC/…)，產品特性異常分析與改善 新產品導入量產與生產良率測試時間優化 俱獨立帶產品作業為佳。

Fully accountable with the team to deliver highly competitive ARM based CPU IP. Implementation skill required ranged from RTL, synthesis, DFT, Floorplan, Placement, CTS, Routing, Timing Closure, and physical verification.

1. Work on 7nm~3nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution

- 架構與規格設計： 定義與設計射頻積體電路 (RFIC) 系統架構，並制定先進通訊解決方案的詳細技術規格。 - 校準與控制開發： 開發並驗證射頻校準演算法與射頻系統控制流程，以優化收發器在各種環境下的效能表現。 - 通訊系統與數位訊號處理： 設計無線通訊系統，並針對射頻性能優化與非理想特性補償，開發專用的數位訊號處理 (DSP) 演算法。 - Architecture & Specification: Define and design RFIC system architectures and detailed technical specifications for advanced connectivity solutions. - Calibration & Control: Develop and verify RF calibration algorithms and RF system control flows to optimize transceiver performance across various conditions. - Communication System & DSP: Design wireless communication systems and implement digital signal processing (DSP) algorithms specifically tailored for RF performance enhancement and impairment compensation.

1. Design and RTL implementation of SoC debug modules 2. Integration and verification of debug components (e.g., trace, monitor, access port) 3. Debug signal capture, trace, and analysis for SoC platforms 4. BUS topology and debug mechanism circuit design 5. Support SoC debug flow and issue localization 6. Collaborate with cross-functional teams to optimize debug performance 7. Documentation and test specification for SoC debug features

1. SOC platform 架構與RTL implementation 2. 負責 IP/子模組之 RTL 整合，組成 SoC (System-on-Chip) 或子系統的頂層設計。 3. 依據設計規格，串接不同來源或平台的 RTL，確保各模組間介面相容與功能正確。 4. 撰寫與維護整合 RTL 的頂層模組、配置腳本及連結測試環境。 5. 針對整合後的設計進行功能模擬、靜態時序分析（STA）、Lint、CDC 及等驗證工作，並協助 debug。 6. 與軟硬體、驗證、後端設計等團隊密切合作，確保整合流程順利與產品交付時程。 7. 編寫設計文件及協助設計交付相關事務。

1.數位電路設計 2.多媒體架構與電路設計 3.多媒體系統整合 1.Digital IC Design 2.Multimedia Architecture and Design 3.Multimedia System Integration

Co-work with algorithm, digital/analog design, firmware, AI tool teams. 0+ ~ 10+ Years Experience in: Agentic AI Workflow/Tool Evaluation/Deployment Data Center & High-Speed SerDes Design Verification Plan & Project Execution Automotive Design Verification Plan & Project Execution 5G/6G Wireless Communication Design Verification Plan & Project Execution Satellite/NTN Communication Design Verification Plan & Project Execution Processor Platform/Peripherals Design Verification Plan & Project Execution Subsystem / System Level Design Verification Plan & Project Execution

1. High Speed digital design implementation 2. Integration from RTL to gate level, including flow QC, timing closure and issue analysis & solving 3. Signoff on design with mixed-signal interface 4. Design methodology and integration flow improvement