轉職熱搜工作

We are looking for AI hardware architect/designer to join our team and play a pivotal role in designing, developing, and optimizing architecture of the neural processing unit (NPU). As an architect/designer, you will be responsible for creating innovative hardware and software solutions that meet the performance, scalability, and efficiency requirements of our advanced NPU environment. The ideal candidate will have a strong background in computer architecture, microarchitecture, and digital design, as well as experience with industry-standard tools and methodologies. You are expected to transform novel ideas into practical proposals for future NPU products, and vet the proposals via prototyping. Extensive knowledge in compiler and operating system is a plus. International travel may be required.

As an Digital IC Design Intern, you will collaborate with our researchers and worldwide colleagues and develop applications and algorithms that make a real difference in everyday devices. Your developments would significantly enhance the experience of numerous end users across our product range.

(請留意：為加快面試安排時間，僅限定投遞5個職缺)我們在找這樣的你：對行動通訊、無線及寛頻連結、家庭娛樂晶片解決方案有濃厚興趣；勇於表達意見，以團隊成功為目標，面對困難不輕易放棄，總是在想更好的做法，擁有創新及不斷學習的精神。聯發科技邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

1. AI ISP 硬體架構設計 2. 系統power 與 bandwidth 設計 3. 相機規格制訂 4. ISP 硬體系統規格驗證規劃 5. 車用安全規劃

1. 開發emulation/prototyping 相關的技術及使用流程 2. 建立CPU/GPU emulation/prototyping 驗證平台 3. 協助project team導入emulation/prototyping 技術 4. emulation/prototyping 使用及工具問題的支持 5. 管理 emulator 及prototyping 硬體與使用分配

AI Model development, system level modeling and HW/SW system level bottleneck analysis

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

1. 屬於DE部門 2. 支援 WiFi/BT, 手機與 ARM computing等產品晶片開發計畫的FPGA與Emulation驗證工作與驗證技術開發 3. 主要為獨立貢獻者； 長期可依照潛力培養團隊領導能力，並有機會與全球科技產品的領導廠商有直接溝通合作的機會，可藉此培養個人與跨國的領導企業一起合作技術開發的能力。 4. 工作目標如下: a) 支援計畫功能與系統驗證與除錯 b) 規劃及協調驗證資源、項目及時程 c) 改善和加速multi-FPGA與Emulator工作流程 d) 增進FPGA與Emulator驗證效能 e) 研發SoC系統電路分析工具

1. Responsible for high-speed UCIE development, including architecture definition, verification, and customer support (familiar with architecture, firmware, debugging, optimization, and testing tasks). 2. Define architecture and specifications through simulations. ( Matlab ) 3. Develop test automation. 4. Collaborate with the team to establish system prototypes and optimize performance. 5. Achieve product integration for clients and support mass production.

1. Model development (includes behavior modeling/ cycle approximate modeling/ power modeling) 2. ESL platform and simulation technology development. 3. Next-generation processor architecure prototyping and design exploration 4. Next-generation modem platform architecure prototyping and design exploration