轉職熱搜工作

歡迎同學提前投遞履歷爭取機會至景碩科技面試，畢業前即拿到科技業OFFER！ ★請備註欲應聘職缺優先序；我們將依照您的志願順序進行媒合 ▍招募職缺： 【製造工程師】 1.協助規劃產品流程所需技術及設備參數評估 2.製程生產參數之測試及驗證 3.製程能力及製程管制規格制定 4.製程良率改善及提升 【製程工程師】 1.製程改善、製程效率提升 2.製程異常排除 【自動化設備工程師】 1.自動化生產設備故障及卡板等例行性分析與改善 2.預防性保養及巡檢機制的執行管理 3.自動化設備改善專案之研擬與執行 ☺可至活動攤位洽詢詳細職缺說明，或依照學經歷安排適合職務面談 ▍應徵方式： 直接投遞1111專區，初步審核通過後將電話或email通知。 校園徵才活動當天至攤位瞭解景碩職缺並投遞履歷，即可獲得抽獎資格~~ 工作地點： 1. 桃園石磊廠：桃園市新屋區中華路1245號 2. 桃園清華廠：桃園市新屋區中華路810號 3. 桃園幼獅廠：桃園市楊梅區高獅路580號

We are seeking a highly skilled DFT/DFM Engineer to join our automotive ADAS SoC chip design team. The successful candidate will be responsible for DFT and DFM methodologies, design, and implementation for our advanced automotive system-on-chip (SoC) designs. The candidate will also collaborate with the design and layout teams to integrate DFT/DFM requirements. • SoC testing architecture design • Support project NPI(new product introduction) to MP(mass production) (test program development, coverage enhancement, yield improvement, cost reduction) • Cowork w/ IP, test engineer, process team, board design to fulfill CP/FT/SLT test requirement.

We are looking for a highly skilled DFT CAD and Methodology Expert to develop and deploy advanced test methodologies for next-generation data center and AI ASIC. Enhancing the efficiency and quality of our ASIC development and testing procedures. The successful candidate will work within the CAD team to innovate test solutions for complex 2.5D/3DIC, ensuring high quality and yield for advanced packaging technologies. Key Responsibilities • Methodology Development: Develop and deploy robust CAD flows for scan insertion, ATPG, pattern simulation, and Memory BIST (MBIST). • Tool Automation: Create scripts (Python, TCL, Perl) to enhance and automate DFT flows, accelerating simulation runtimes and improving quality of results (QOR). • EDA Tool Integration: Collaborate with EDA vendors to enhance tools for advanced packaging, including test verification and pattern generation. • Support & Debug: Support DFT integration teams with CAD flow issues, debug complex issues, and provide technical mentorship. • 3DIC/2.5D Expertise: Develop and implement testing strategies for chiplets and TSV-based 3D stacks. • Location: Hsinchu, Taipei, Singapore.

1. SoC IC implementation 規劃設計 2. DFT 規劃設計 以及timing closure signoff 3. 設計方法流程開發及優化 4. 工作地點:新竹/台北

此職位高度重視執行力、組織協調以及所有ASIC設計的準時交付。 該職位負責協調涵蓋設計、驗證、PD、測試、DFT、封裝測試、營運和供應鏈等多個領域的複雜跨學科工作。 專案經理確保所有內部團隊從概念到生產全程保持一致，同時識別並克服所有風險和跨職能依賴關係。 This role is highly focused on execution excellence, organizational alignment and on-time delivery of all ASIC designs. This role coordinates complex multi-disciplinary efforts spanning, Design, Verification, Physical Design, Test Vehicles, DFT, Packaging Test, Operations and supply chain. The program manager insures that all internal groups are aligned from concept through production while identifying and overcoming all risks and cross functional dependencies.

0. 基本英文文書能力 1. Responsible for establishing and improving software engineering relevant systems and automation mechanism 2. Responsible for improving software configuration management systems 3. Responsible for improving release automation systems 4. Responsible for improving Linux build environment

We are looking for candidates that can communicate complex engineering subjects effectively to cross functioning technical teams and upper management. Strong DFT and leadership skills will be put to good use. Successful DFT architects interact with many external teams and must confidently represent his/her organization. Key Responsibilities • Drive DFT Excellence: Define DFT architecture specifications that enhance ATE and production test environments, optimize test costs, and improve quality across future MTK ASIC product portfolios. • End-to-End DFT Leadership: Manage comprehensive DFT activities spanning architecture definition, design implementation, verification, and test deployment for new product launches • Manufacturing Integration: Serve as a key contributor within MTK’s Global Quality and Operations organization to deliver optimal manufacturing test solutions from early product conception through post-silicon validation • Design Collaboration & Quality Assurance: Partner closely with design teams to ensure accurate implementation of DFT structures and compliance with specifications • Cross-Functional Team Coordination: Lead internal DFT teams in developing and implementing robust test solutions aligned with architectural requirements • Yield Optimization Strategy: Develop comprehensive plans for diagnosability enhancement and systematic yield improvement • Location: Hsinchu, Taipei, Singapore, USA

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1.協助規劃產品流程所需技術及設備參數評估 2.製程生產參數之測試及驗證 3.製程能力及製程管制規格制定 4.製程良率改善及提升

1. 負責MES系統之管理, 維運與新功能開發。 2. C#、ASP.NET 程式開發，以Visual Studio及AI工具提升開發及維運效率。 3. 製造資訊系統優化、效能提升。 4. 新廠擴建IT系統專案參與、執行。 5. 團隊合作，IT系統需求分析、規劃、開發、測試及時程管控、執行交付的項目、提升公司生產效率。