轉職熱搜工作

1. 進行射頻系統性能驗證工作，確保測試結果符合測試規範需求。 2. 與演算法及軟體部門合作開發與PA相關的省電技術。 3. 使用DPD技術改善PA的線性度與效率。 4. 支持重要客戶完成工廠校準時間的優化工作。 5. 撰寫高品質的技術文檔，並交給客戶支援單位以執行客戶支持。

-規劃並執行高速介面（如 PCIe, USB, DP, UFS, CSI, UCIe）IP PHY 驗證。 -建立並維護測試平台，進行 System 與 Electrical 測試。 -使用 Scope, BERT, LA, Signal Analyzer 等儀器進行 Signal Integrity 與 Compliance Test。 -分析測試結果，協助 DE 及 SW 團隊解決問題。 -設計並開發硬體 PCB 評估板，支援系統驗證。

1. 開發用於模擬手機/平板/車用SOC功率消耗的平台 2. 協助IP, SOC與軟體團隊，維護用於功耗分析的資料庫，開發相關工具以輔助跨團隊的資訊整合 3. 優化系統效能，輔佐系統功耗相關決策的進行

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

Role Summary: We are seeking a Principal Product Engineer to support advanced optical product development, NPI, manufacturing transfer, production ramp, and sustaining engineering in Taiwan. This is a senior individual contributor role requiring deep hands-on experience in fiber optics, optical module manufacturing, process integration, yield improvement, and cross-functional execution with engineering, operations, quality, supply chain, and contract manufacturing teams. The ideal candidate will serve as a technical lead for optical product engineering in Taiwan, helping drive products from development builds through qualification, pilot production, and high-volume manufacturing. Key Responsibilities: • Lead product engineering execution for optical products from prototype builds through qualification, production release, and sustaining support. • Support NPI planning, engineering builds, manufacturing readiness, test readiness, process transfer, and ramp execution. • Drive technical issue resolution across optical assembly, fiber attach, process integration, module test, final test, reliability, and customer quality. • Work closely with design engineering, optical engineering, packaging, test, reliability, operations, quality, and supply chain teams. • Partner with contract manufacturers and suppliers to resolve yield, quality, process, material, and production ramp issues. • Lead data-driven yield improvement using production data, failure pareto analysis, root-cause investigation, corrective action, and process optimization. • Support development and release of optical assembly and fiber attach processes, including process flows, control plans, inspection criteria, process windows, and manufacturing release criteria. • Provide technical leadership for product characterization, margin analysis, failure analysis, reliability learning, and production excursion response. • Help define manufacturing specifications, test limits, outgoing quality controls, and product-level production metrics. • Support customer or supplier technical escalations related to product quality, manufacturing performance, or reliability.

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip

Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

• 規劃從silicon bring up到量產全過程的測試程式（包含 CP/FT、系統測試、DVT、HQA、相關性分析及 DPPM 降低）。 • 開發功能測試/ATPG/MBIST測試碼，涵蓋程式開發、模擬、coverage收集、機台測試程式生成以及在測試機上的驗證。 • 基於對CPU design的了解以及實驗設計, debug post-silicon DPPM, RMA問題。

1.制定和實施品質管理策略和流程，確保品質符合規範 2.監控生產過程，進行產品檢驗和測試，分析數據以改善產品質量 3.領導品質團隊，提供培訓和支持，促進團隊成員的專業發展 4.與生產、工程及供應鏈等部門協作，解決品質問題並推動持續改善 5.進行內部和外部品質審核，確保遵循ISO及其他相關標準 6.針對客戶反饋和品質問題制定解決方案，提升客戶滿意度