轉職熱搜工作
您正在找測試工程師的工作,共計8665筆職缺在等你,馬上去應徵吧!
-
A14 R&D Integration Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Aspire to be a part of a visionary team that develops world-class, cutting-edge technology for the A14 platform? This is a call to those who wish to delve into the realm of interconnect and chip/package (2D/3D) co-optimization, where your work will be integral to our success. Responsibilities: 1. Championing Technological Excellence: (1) Optimization Wizardry: Ensure the A14 program excels by harmonizing process requirements across performance, yield, reliability, and manufacturability through strategic process integration and baseline maintenance. (2) Design & Validation Expertise: Lead the tape-out process and rigorously test key designs to validate design rules, refine electrical modeling, and elevate yield outcomes. (3) Benchmarks & Characterization: Analyze and characterize the electrical performance relative to the process, establish SPICE modeling benchmarks, and perform selective bench measurements to guarantee precision and quality. 2. Collaborative Innovation: (1) Analytical Problem-Solving: Bring your innovative mindset to team efforts, using data analysis to uncover process issues and co-developing new processes as solutions alongside talented peers. (2) Process Evolution: Play a pivotal role in evolving processes from advanced integration baselines to full-scale volume production, ensuring a smooth transition and exemplary results. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Specialty Engineer (Specialty)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19035&source=1111&tags=Domestic+Campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Novel devices developing for specialty technology. 2. Device Simulation, Test-chip design tape out and measurement system developing. 3. Process flow developing for production. 4. Collaborate with related teams for Design Collaterals (DRM/DRC/LVS/SPICE/PDK) developing. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
R&D Power Grid Design and Sign-Off Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=475&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Organization Introduction: We are power grid design and sign-off team for digital design inside TSMC. The mission is to develop power grid design and co-optimize with semiconductor process in advanced technology nodes for most updated commercial design contents (CPU, GPU, SoC, etc.) Our power grid designs are references for worldwide 1st Tier design houses. Responsibilities: 1. Develop power grid structure for most updated commercial design contents (CPU, GPU, SoC, etc.) and check IR/EM (Electron-Migration) performance. 2. Provide design solutions for IR/EM and routing optimization. 3. Co-work with process R&D for process tuning to achieve better PDN (Power Delivery Network) design. 4. Support TSMC advanced process node test chip PDN sign-off checks, including PDN quality check, static/dynamic IR sign-off, and EM sign-off for successful chip tape-out. 5. Provide guidance and suggestion to PnR (Place and Route) designer on PDN issue fixing. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Intelligent Manufacturing Engineer (IMC/MFG)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19040&source=1111&tags=Domestic+Campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. 智慧製造工程師為創造晶圓產出最大化,滿足客戶交期,為公司帶來營收;身為工廠的第一線管理者,需掌握生產流程,藉由良好且精準派工提升機台生產效率,帶領技術員團隊確保製造流程順暢運行並達成每日的產能目標。 As a global semiconductor technology leader, TSMC is seeking an Intelligent Manufacturing Engineer to join our team. Our commitment to driving manufacturing excellence has led us to integrate artificial intelligence, machine learning, expert systems, and advanced algorithms to build up an intelligent manufacturing environment. Join TSMC, we are the most advanced technology team and connect with the world, as we head towards an unlimited future. We look forward to you joining us! You will be assigned to one of the following five roles according to your interest, experiences, and technical background. 1. MFG Intelligent Manufacturing Engineer As an Intelligent Manufacturing Engineer, you will be responsible for the development and maintenance of these intelligent manufacturing systems, which are widely used for scheduling and dispatching, employee productivity, equipment productivity, process and equipment control, quality defense, and robotic control. By optimizing quality, productivity, efficiency, and flexibility, you will play a crucial role in driving the success of our manufacturing operations. (1) Smart manufacturing engineers will learn leading artificial intelligence manufacturing technologies worldwide. (2) Big data analysis, improving production efficiency: Through data analysis, identify bottleneck machines and improve machine production efficiency. Breakthrough analysis and dispatching project system, optimize production resources and maximize manufacturing efficiency. (3) Machine learning, creating unlimited possibilities: Utilize cutting-edge machine learning technology to improve the production process and create innovative applications that achieve optimal scheduling and maximize wafer production capacity. 2. CIM Intelligent Manufacturing Engineer (1) Software Developers: Design and develop intelligent manufacturing solutions for factory automation, manufacturing scheduling and dispatching, decision making and engineering analysis. (2) Dispatching Algorithm Developers: Heterogeneous data integration and corresponding solution design and development. (3) Quality Management Engineer: Server maintenance and related setting support including routine upgrades, troubleshooting with AP teams, high-availability architecture, virtual machines solutions, firewall rule, IIS, Nginx, database middle etc. 3. Data Analyst & Data Scientist (1) Application of statistics, machine learning, data mining, pattern recognition and other data analysis by AI techniques. (2) Your main responsibility will be to collect, explore, and extract insights from very large scale structured and unstructured data and explain these insights with the help of data visualization tools to support fab operations. 4. AMHS (Automated Material Handling System) Engineer (1) AMHS (Software) system & AI development/(Hardware) layout design & transport simulation. (2) Enhance System Performance, Quality and Reliability. (3) Coordinate cross-organization AMHS projects. 5. PIDS/WAT (Wafer Acceptance Test) Engineer (1) New WAT tool data matching and release. (2) WAT quality/manufacturing efficiency improvement. (3) WAT tool, recipe, and system management. (4) WAT productivity and quality improvement. (5) WAT tool and systematic issue troubleshooting. 6. PIDS/NTO (New Tape Out) Engineer (1) Handle mask tape out and manufacturing flow creation. (2) Manage projects related to NTO system development and enhancement. 7. Quality Management Engineer (1) Manage audit, defense, and quality systems. (2) To perform data analysis and simulation. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Research and Development Engineer (R&D)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19033&source=1111&tags=domestic+campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: R&D Engineers will be part of a grand joint-force working on advanced technologies, including but not limited to exploratory research in advanced device architecture, market-oriented design IP enablement, device and process integration for manufacturability, package-level interconnect solutions, and novel material/equipment/process evaluations. 1. Research & Pathfinding (1) New material and new process pathfinding to enable new device architecture with integration. (2) New tool pathfinding for new materials to enable the next nodes. (3) Design, execute and analyze experiments to meet R&D engineering specifications. (4) Process stability & manufacturability improvement for yield and reliability qualification. (5) Process/tool transfer to development R&D or volume manufacturing (Fab). (6) Highly motivated individuals with a strong technical background and teamwork skills. 2. Integration (1) Technology definition: design rules, design-technology co-optimization, logic/memory IP evaluations, etc. (2) Technology development infrastructure: productivity enhancement, product inspection methodology, mask-making, and test flow, etc. (3) New test vehicle establishment and validation: improvement of device yield and reliability (learning cycles). Improve yield and reduce defects by quantifying defect attributes using programming skills and developing effective detection methodologies. (4) Customer design enablement: SPICE Modeling and IP qualifications. 3. Module (1) Develop advanced processes, materials, tools, models, and computational methodologies for leading edge technologies. (2) Deliver manufacturable, stable, cost-effective technologies with device performance improvement for yield and reliability qualification. (3) Transfer process and tool to high volume manufacturing fab. 4. R&D Process Center (1) PE: Advanced module process development and baseline sustaining. (2) EE: Handle advanced equipment at R&D stage. Install, warm up, sustain and troubleshooting solve with new technology equipment. (3) MFG: Oversee the daily operations of IC foundry to ensure that all profiling operations, workflow, and customer reports are consistent with agreed upon service operations. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Design and Technology Platform Engineer (DTP)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19034&source=1111&tags=domestic+campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. Responsibilities: At the beginning of new module research, IC design engineers and R&D engineers would closely cooperate with customers. Once the new module technologies are developed, we could accomplish the goal of massive production and have customers’ new product launch in a short time. At TSMC, you will have the opportunity to work with the most advanced module technologies, provide solutions to partners in the global IC design ecosystem, and ensure competitiveness in power, performance, and area. 1. Physical Designer The principal responsibility of the candidate is to perform complete netlist to GDS physical design steps which include floor plan, PNR, timing closure, IR/EM analysis, layout verification, formal verification, and other tape out related tasks. The candidate will work in a talented team to design advanced chips using cutting-edge process nodes while meeting high standard design requirements. 2. Standard Cell Engineer (1) Pathfinding of library characterization for leading edge tech nodes. (2) Support industrial standard library kits generation and QC. (3) In-house library generation flow and/or utility development. (4) RC parasitic extraction analysis and APR related analysis. 3. Layout Engineer (1) IC layout for advanced technology (Std. cell/Memory/AMS/IO). (2) Layout structure development for new technology. (3) Pathfinding for new technology development. (4) Customer engagement and layout support. (5) Design and technology co-optimization (DTCO). (6) AI and automation for layout and physical design. 4. System and Chip Design Solutions Development Please refer to the Link: https://careers.tsmc.com/zh_TW/careers/JobDetail?jobId=516 5. FE design & DFT (1) Test chips development for advanced nodes, including physical design (APR), logic synthesis and DFT (Scan insertion + ATPG). (2) Design flow development for test chips design, which requires the programming skills, Tcl, Python, C-shell scripting etc. (3) Technology benchmarking for PPA evaluation of the advanced nodes. (4) DTCO (Design & Technology Co-Optimization) pathfinding and development. 6. SRAM Engineer (1) SRAM design in advanced nodes for mobile, high-performance computing, IoT, automotive applications. (2) RRAM/MRAM, emerging memory development. (3) In memory computing research and development. 7. Design Flow/Methodology (1) Advanced technology process design kits (PDK) and tech files (DRC, LVS, RC, etc.) development and technical support. (2) Advanced technology design development flow development and technical support. (3) Automation program development to support design kits and flow development productivity/quality. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
【2026 TSMC Campus Recruitment】Advanced Packaging Technology and Service Engineer (APTS)
面議(經常性薪資達4萬元或以上) 40000元 新竹縣寶山鄉 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=19043&source=1111&tags=Domestic+Campus+2026_1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. As of 2024, TSMC serves more than 500 customers and manufactures over 11,000 products for high-performance computing, smartphones, the Internet of Things (IoT), automotive, and digital consumer electronics. It is the world’s largest provider of logic ICs, with an annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and the Company began construction on a specialty technology fab in Dresden, Germany, in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: TSMC‘s advanced packaging process is an efficient and high-density packaging technology that mainly targets the demand for high-performance semiconductor components, including microprocessors, graphics processors, artificial intelligence chips, etc. This technology uses advanced 3D stacking technology to vertically stack multiple chips and uses high-density packaging materials to fix them together. This technology can improve the performance of components, reduce power consumption, reduce package size, and increase system integration. TSMC‘s packaging process includes various technologies such as CoWoS, InFO. Among them, CoWoS is a technology that connects different chips through copper wires through silicon interconnect technology to achieve high-frequency and high-speed data transmission. InFO technology directly encapsulates chips on the substrate, connecting chips and substrates through tiny copper wires, achieving a more compact and efficient packaging solution. TSMC‘s advanced packaging process can improve chip performance and production efficiency, and meet the packaging technology requirements of modern high-performance electronic products, such as smartphones, artificial intelligence, high-performance computing, and other fields. TSMC‘s advanced packaging organization include Testing R&D Engineer conduct exploratory research in DFT test architecture, evaluate next-gen test technology of several device (logic SOC, HPC, AP, RF, etc.),which used 3D silicon stacking and advanced packaging technologies and closely teamwork with international customer from new product introduction to mass production. Fostering a global inclusive workplace reflects TSMC’s core values and business philosophy and is essential for our future success. Our commitment to global inclusive workplace allows us to create an environment where every employee, regardless of gender, age, disability, religion, race, ethnicity, nationality, political affiliation, or sexual orientation, can bring their unique perspective and experiences to work, enabling us to drive profitability, increase productivity, and unleash innovation. We strive to create a workplace that is equitable and accessible to all employees. We are committed to fostering an inclusive culture where every employee feels valued and empowered to contribute to our mission and provide excellent service to our global customers.展開 -
機電工地主任
月薪 55000~80000元 新竹縣竹北市 3~4年工作經驗1.與施工者協商,確定施工計畫、水準及程序 2.在施工期間,進行實際檢核及測試,並監督工程使其符合設計規格及工料標準 3.向業主報告進度及施工狀況 4.轉達施工要領,矯正不良施工,並協助解釋施工規範問題 5.協助公司辦理廠商計價、業主計價,回報公司工地狀況 6.工程現場管理與規劃、負責工地監工、人員調派、工程分包安排及業務處理。 7.工程估算並監督產線設備運作順暢,及工程正確進行流程,以使產品規格品質符合需求 8.協助相關資料送審、查驗資料統整、結算資料統整、填寫工程日報表 9.協助現場作業品質、進度督導、施工品質之查驗與驗收、整合工作 10.現場進度與勞工安全衛生管理 11.基本AutoCAD操作及修改展開 -
高雄工程部技術員(12吋廠)
月薪 32000~43000元 高雄市楠梓區 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=4670&source=1111 台積公司成立於1987年,率先開創了專業積體電路製造服務之商業模式,自此成為世界領先的專業積體電路製造服務公司。台積公司以領先業界的製程技術及設計解決方案組合支援其客戶及夥伴生態系統的蓬勃發展,以此釋放全球半導體產業的創新。身為全球的企業公民,台積公司的營運範圍遍及亞洲、歐洲及北美,致力成為企業社會責任的行動者。2024年,台積公司提供最廣泛的先進製程、特殊製程及先進封裝等不同製程技術,為500多個客戶生產超過11,000種不同產品。台積公司企業總部位於台灣新竹。進一步資訊請至台積公司網站https://www.tsmc.com.tw查詢。 說明: 1. 在製程部門,協助工程師處理線上事務,包含產品異常處置與機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 2. 在量測部門,協助工程師維護量測程式,量測資料異常確認,量測機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 3. 在檢測部門,操作電子顯微鏡拍照並針對拍攝的缺陷照片進行分類,檢測機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 4. 採四班二輪制:工作兩天,休息兩天 5. 須輪班:依部門而異,3~5個月夜班、3~5個月日班 6. 班別工作區間(含休息時間):日班-7:20AM~7:20PM;夜班-7:20PM~翌日7:20AM 7. 日班總月薪約32,000 元;夜班總月薪約 43,000 元;另享有分紅獎金,平均年薪達75萬元以上 營造一個合乎台積公司核心價值與經營理念的全球共融職場,對於公司未來成功至關重要。台積公司對全球共融職場的承諾,旨在讓每位員工無論性別、年齡、身心障礙、宗教、種族、族群、國籍、政治立場或性傾向,都能將其自身的觀點與經驗帶入工作,促進企業推升獲利、增加生產力並釋放創新。我們致力於創建一個公平無障礙的工作場所。台積公司承諾促進文化共融,讓每一位員工都覺得被重視且有能力為企業使命提供貢獻,並為全球各戶提供卓越服務。展開 -
南科工程部技術員 ( 12吋廠 )
月薪 32000~43000元 台南市善化區 工作經歷不拘【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表,此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=446&source=1111 台積公司成立於1987年,率先開創了專業積體電路製造服務之商業模式,自此成為世界領先的專業積體電路製造服務公司。台積公司以領先業界的製程技術及設計解決方案組合支援其客戶及夥伴生態系統的蓬勃發展,以此釋放全球半導體產業的創新。身為全球的企業公民,台積公司的營運範圍遍及亞洲、歐洲及北美,致力成為企業社會責任的行動者。2024年,台積公司提供最廣泛的先進製程、特殊製程及先進封裝等不同製程技術,為500多個客戶生產超過11,000種不同產品。台積公司企業總部位於台灣新竹。進一步資訊請至台積公司網站https://www.tsmc.com.tw查詢。 說明: 1. 在製程部門,協助工程師處理線上事務,包含產品異常處置與機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 2. 在量測部門,協助工程師維護量測程式,量測資料異常確認,量測機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 3. 在檢測部門,操作電子顯微鏡拍照並針對拍攝的缺陷照片進行分類,檢測機台異常復歸(與設備工程師協調合作),追蹤與執行工程師交接事項 4. 採四班二輪制:工作兩天,休息兩天 5. 須輪班:依部門而異,3~5個月夜班、3~5個月日班 6. 班別工作區間(含休息時間):日班-7:20AM~7:20PM;夜班-7:20PM~翌日7:20AM 7. 日班總月薪約32,000 元;夜班總月薪約 43,000 元;另享有分紅獎金,平均年薪達75 萬元以上 營造一個合乎台積公司核心價值與經營理念的全球共融職場,對於公司未來成功至關重要。台積公司對全球共融職場的承諾,旨在讓每位員工無論性別、年齡、身心障礙、宗教、種族、族群、國籍、政治立場或性傾向,都能將其自身的觀點與經驗帶入工作,促進企業推升獲利、增加生產力並釋放創新。我們致力於創建一個公平無障礙的工作場所。台積公司承諾促進文化共融,讓每一位員工都覺得被重視且有能力為企業使命提供貢獻,並為全球各戶提供卓越服務。展開
