轉職熱搜工作
您正在找廣告設計的工作,共計31042筆職缺在等你,馬上去應徵吧!
-
SOC Digital Designer and Integrator
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗1. 數位晶片設計流程與整合 2. 熟悉低功耗的設計流程(和架構) -
SOC On-Die Sensor Tech & Correlation Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗1. Perform pre-silicon and post-silicon correlation and modeling related to adaptive voltage scaling and on-die sensor 2. Develop and improve post-silicon testing methodologies related to adaptive voltage scaling and on-die sensor展開 -
Senior DV manager
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 10~11年工作經驗• Lead the DV effort of a high-end CPU project. • Manage, coach and guide DV engineers. Follow up status and keep up the schedule. • Architect and implement top-module testbenches and their components using UVM-based methods. • Lead the effort of building in-house BFMs to facilitate co-sim based module level verification. • Architect and implement formal verification based module level testbench. • Work with the design team to create testplans. Implement checkers/assertions/coverage check points. • Work with validation folks to improve design visibility展開 -
手機DRAM/Storage系統應用工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗1. 智慧型手機系統記憶體與儲存: DRAM (LPDDR4, LPDDR5, LPDDR6...) / Storage (UFS, eMMC...)驗証 2. 系統驗証方法研究與開發 3. 規畫驗証計畫 (test plan, test case) 4. 自動化測試環境開發展開 -
Smartphone SLT (system level test) 自動化整合工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 3~4年工作經驗1.Smartphone SLT軟體整合(C/Android) 2.Smartphone SLT量產測試自動化流程改善 -
<Data center>Senior Signal and Power Integrity Engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 8~9年工作經驗We are looking for a highly experienced PISI Technical Leader to join our team. The ideal candidate will have extensive experience in Power Integrity and Signal Integrity, with a strong background in high-speed IO interface simulations and PDN analysis. As a PISI Technical Leader, you will guide customers through Signal Integrity and Power Integrity signoff, model and optimize system components, and collaborate with various teams to ensure optimal package, PCB, die, interposer, and substrate designs. 1. Guide customers to complete Signal Integrity and Power Integrity signoff. 2. Model and optimize vias, connectors, sockets, breakouts, and various system components using commercial tools. 3. Perform system-level signal integrity simulation in high-speed IOs such as PCIe, SerDes 4. Architect and simulate power delivery systems, including multiple dies, substrate, interposer, PCBs, and on-die PDN models. 5. Collaborate with multiple teams, including layout, design, and customers, to optimize package, PCB, die, interposer, and substrate designs.展開 -
資深軟體驅動工程師_竹北
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 4~5年工作經驗• SoC FPGA/ASIC 驗證和驅動程式開發 • 在Windows和UEFI平台上進行SoC SDK平台開發 • 在ARM平台上進行Windows系統分析和性能改進展開 -
民國115年度研發替代役
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 工作經歷不拘參與電源產品(UPS, Inverter, Charger)開發設計,職缺包含 - 硬體線路設計 - 編寫韌體程式 - 結構包裝設計 - 熱模擬分析 電源產品功能測試驗證 新零件或新架構評估導入展開 -
-
【台北】研發機構主管
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 10~11年工作經驗1.配合客戶前端設計,根據性能要求分析,提出解決方案 2.跨部門溝通推動專案執行、管理 3.新產品設計開發 4.人員管理 5.領導團隊滿足客戶需求及公司目標展開
