轉職熱搜工作

工作項目： Verification for High Speed PHY projects, which includes: 1. Responsibility for test plans, testbench documentation and implementation. 2. Use SystemVerilog language, SVA and UVM methodology for block level verification. 3. Debug tests with design engineers to deliver functionally correct design blocks. 4. Close coverage measures to identify verification holes and show progress towards tape-out. 5. Write scripts to automate routine parts of verification workflow. 應徵條件： 1. 碩士以上; 電子、電機、資工、電信、電控、資科等相關科系畢業為主。 2. 具0~3年下列經驗之一者尤佳： (1) Experience verifying digital logic at RTL using SystemVerilog for FPGAs and/or ASICs. (2) Experience verifying digital systems using standard IP components/interconnects. (3) Experience creating and using verification components and environments in standard verification methodology. 3. Preferred qualifications: (1) Experience with high speed MAC/PHY RTL design or verification. (2) Experience with UVM methodology and coding. (3) Good English verbal communication skills.

工作項目： 1. High-Performance CPU/GPU Timing & Power Integrity Signoff 2. High-Performance CPU/GPU Post-Silicon Validation & Debug, Sim-to-Silicon Correlation 3. 協同開發 CPU/GPU Advanced DFT, On-Chip PVT Sensor, Performance Improvement & Power Management 等先進技術 4. 支援產品 SoC Projects，協同執行 High-Performance CPU/GPU 專案開發，導入先進 IP 及技術 應徵條件： 1. 碩士以上；電機、資工、電子相關科系畢業為主。 2. 熟悉 SoC Integration & Design Flow、Frontend/Backend/DFT/Timing/IR Drop/Power Analysis EDA Tools。 3. 有 ARM Cortex-A CPU/Subsystem Design/Integration/PPA Optimization/Sign-off 經驗尤佳。 4. 有 Chip-Level, Package & PCB Power Integrity Optimization 經驗尤佳。 5. 有On-Chip PVT Sensor 開發經驗尤佳。 6. 有Post-Silicon Validation, Debug 及 RMA 分析經驗尤佳。 7. 積極負責、溝通協調能力強、勇於迎接挑戰，對於 High-Performance CPU/GPU Technology 有興趣者。

工作項目： 1. SOC integrator! A challenging job for integrating the designs from over 100 digital designers and tens of analog designers. A challenging job of using deep submicron process. 2. Building & Improving the standard environment for digital designers to run front-end flow, such as synthesis, STA analysis, linting, and so on. 3. Cooperating with APR designers for backend timing closure. 4. Block / Whole-Chip CTS (Clock-tree Synthesis) analysis and improvement. 應徵條件： 1. 碩士以上; 電機工程、電信工程、電控工程、電子工程、資訊工程、資訊科學、動力機械、自動控制、通訊工程等相關科系畢業為主。 2. 熟悉 verilog, verdi, STA, synthesis. 3. 具 CTS(Clock tree synthesis) Design/Debug經驗者尤佳。 4. 會寫 script如 perl者更佳。 5. 具六年以上相關工作經驗。

1. Summary Realtek Semiconductor Corp., located in the Hsinchu Science-based Industrial Park, Taiwan‘s 〝Silicon Valley〝, established in 1987. Realtek‘s efforts to provide the ultimate in pioneering IC technology — along with its firm commitment to creating unique and innovative designs for a broad range of high-tech applications — have won the company a worldwide reputation and made possible a favorable and consistent growth rate in the years since its establishment. In line with the Realtek culture of 〝Self-confidence and trust in people〝, we believe that we can achieve our best, and trust our colleagues can also do the same. Working and learning in Realtek, we openly share knowledge and experience with one another to inspire innovation and pursue growth of the company, as well the individuals. Talent is the important capital of Realtek. Welcome to Join Realtek Family! 2. Essential Job Functions ‧Locate in Southern part of Germany (Frankfurt to Stuttgart, or Stuttgart to Munich) ‧Provide pre-sales and post-sales support. ‧Understand customer requirements, and deliver technical presentations, reports, documents and technology demonstrations. ‧Support customer product development and design. ‧Support customer issue analysis and resolve. ‧On-site support for debug or certification test. ‧Cross-functional collaboration with Realtek internal resources. 3. Education, Skills, Abilities, And Experience Required ‧M.S. or B.S. in Engineering or equivalent. ‧3 to 5 years of progressive professional technical experience in IC design or related areas, direct experience in IC design house FAE is preferred. ‧Strong analytical and problem solving skills. ‧Strong written/verbal communication and negotiation skills. ‧Being proactive and willing to take initiatives. ‧Ability to work independently to achieve goals. ‧Ability to understand and explain technical issues and solutions to technical and non-technical personnel. ‧Native German skill. ‧Medium or higher English skill. ‧Familiar with Ethernet protocols will be a plus. ‧Familiar with Automotive ecosystem will be a plus. ‧Basic or higher Chinese skill will be a plus. ‧Experience of Linux system will be a plus. 4. Industry Automotive Ethernet, Semiconductor 5. Employment Type Full-time 6. Job Functions Engineering, Business Development

1.招募與人才任用：負責職缺刊登、履歷篩選、面試邀約、錄取通知及到職安排，協助各部門找到合適人才。 2.人事行政與員工資料管理：辦理員工到職、離職、異動、勞動契約、人事資料維護及相關文件管理。 3.考勤、薪資與勞健保作業：協助出缺勤、請假、加班、薪資資料、勞健保、勞退及相關人事作業。 4.制度流程建立與執行：協助建立與優化各部門人事規章、工作規則、教育訓練、績效考核及人資相關流程。 5.員工關係與管理報表：協助處理員工日常人資問題，招募進度、人員編制、出勤異常、離職率等。 6.上級交辦有關人力資源相關事項。

【職務簡介】 尋找具備系統開發與運維經驗的優秀工程師！在此角色中，您將負責優化核心資訊系統， 並運用 AI 工具驅動生產與作業流程的自動化。若您具備製造業或 PCB 產業背景，這將是展現技術影響力的最佳舞台。 【工作內容】 系統維運與架構部署：建置、管理與維護公司核心產品資訊系統，確保高可用性與穩定度。 智慧自動化開發：設計生產作業與設備參數之自動化程式，提升整體營運效率。 開發規範制定：制定與優化企業級軟體開發與作業標準流程。

🌟 開啟孩子學習語言的精彩旅程，你就是關鍵！ 準備好和孩子們一同探索語言的奇妙世界嗎？ 你的教學熱情將點亮孩子的未來！ 📚 你將會： 1. 設計充滿趣味與挑戰的英語學習課程，讓孩子愛上語言學習 2. 善用多媒體教學工具，讓課堂既生動又有效率 3. 引導學生提升溝通能力，建立自信心 4. 認真準備和編寫教學教材，滿足多元學習需求 5. 耐心觀察每位學生的進步，適時調整教學策略 🎉 加入我們，一起為孩子開啟學習的無限可能！ 你的專業與熱情將成為他們邁向成功的基石！準備好一起成長了嗎？

工作項目： 1. 先進製程標準元件庫電路佈局。 2. 先進製程記憶體電路佈局。 3. 客製化IP電路佈局與實現。 4. Fully Layout environment、flow and utility build-up. 5. In-house PDK development. 應徵條件： 1. 大學或專科以上；科系不拘，電機、電機與控制、電信、電子、資工、資訊相關科系畢業為佳。 2. 具5年以上下列相關經驗者為佳： (1) 熟悉 Virtuoso XL/Laker Layout editor使用。 (2) 具備 Physical verification(DRC LVS)驗證與修正能力，先進製程尤佳。

主要工作內容 1. 協助Facebook粉絲專頁及其他社群平台的日常經營與內容更新 2. 協助PO文汽機車保養、維修、改裝介紹及活動宣傳文案 3. 使用美編軟體或AI製作社群貼文、活動圖片、促銷素材及基本影片內容 4. 依據品牌風格規劃社群版面與視覺內容，維持貼文品質與一致性 5. 協助處理門市維修預約、服務詢問及客訴回覆 6. 配合主管交辦之其他相關事項 若您對車子相關有興趣與熱誠，歡迎加入我們厚德！