轉職熱搜工作

• 參與3GPP RAN4會議，包括可能的線上或線下討論，以及協助撰寫會議技術文稿 • 檢驗內部及外部標準提案的有效性，透過鏈路級模擬或系統級模擬來撰寫技術文稿 • 於鏈路級模擬或系統級模擬程試中開發新的模組來支援最新3GPP標準的功能 • 參與內部或外部會議，提供想法創意，以及所需之效能評估

Work on security technologies such as trustzone, virtualization, secure boot cryptography, key management, physical defense and more. Participate in owning the embedded security software architecture used by our products. Bridge the gap between hardware and software architecture definition by defining software interfaces for security HW IPs, defining strategy for petitioning use cases and mapping those parts to various security HW IPs and defining, tracking and optimizing for relevant system. Work with cross-functional teams to ensure architected features are successfully deployed in product. Ensure that the defined solutions integrate well with the operational logistics of HW IPs spec, test, bringup and SW development flows.

從系統效能，功率消耗，溫度控制...等多重面向分析產品競爭力，進而從系統角度優化硬體架構及軟體控制策略。 Optimize hardware architecture and software control strategy in aspects of system performance/power/thermal to improve MediaTek‘s product competitiveness.

Work location: Chupei/Taipei UWB architecture design for mobile market

The Modem Technology Architecture team is currently involved in the architecture definition, design and validation of MediaTek’s 5G NR chipsets. In your role as Modem Architect, you will be responsible for the architecture definition of state of the art cellular modems used in User Equipment (UE) devices. You will be comfortable working across HW/SW boundaries and will have experience exploring and quantifying the impact of different architecture decisions on performance, area and power consumption.

In this role, you will be a member of the System-Level-Cache (SLC) design team, working with architecture, modeling, silicon, software and other design teams to develop competitive SLC design. We are looking for highly motivated, hands-on individuals who are passionate about memory performance improvement to benefit memory access behavior in sophisticated system. Major Responsibilities: •Co-work with system architect to develop competitive memory system architecture • Analyze/improve memory system performance including latency and efficiency • Responsible for micro architecture planning and RTL design coding •Integrate IP into project and meet schedule and P.P.A. requirement •Co-work with DV team to well verify RTL design •Support software team to resolve memory system related issue

In this role, you will be a member of the System-on-Chip (SoC) Infrastructure team, responsible for Architecture and design for high-performance, low-power on chip interconnect and fabric components. Analyze the interconnect fabric at SOC level and sub-subsystem level and configure fabric components to meet bandwidth, latency, power needs of SOC. Work with cross function teams (architect, hardware, software, verification…) to develop system models and IPs for different architectural options for power, performance and cost trade offs.

1. Perform threat modeling on system security, give security recommendations on security design, and refine the security design guidelines 2. Perform vulnerability analysis, code review, security/fuzz testing on software security 3. Respond to product security incidents, coordinate engineering teams and partners to solve security related issues 4. Participate in product security related activities process and specification definition, writing, and review. 5. Implement or introduce tools for vulnerability discovery, and perform security auditing or testing with products The actual content and scope of job depends on the involved tasks.

• You will work as part of analog project management team and work closely with SoC Integration teams responsible for enabling on-time silicon to meet aggressive product schedules. • Multi-task skills will be key to lead several tasks of project at a time. • Track and drive resolution of technical issues between multi-functional teams including Design, Verification, Validation, Process Technology, Packaging, Quality and Reliability, System Hardware and Application. • Convert data into a clear story to communicate to partners and organizations at all levels. • Pull together regular project status presentations for executive leadership review. • Identify risks, develop mitigation strategies and facilitate conflict resolution. • Collaborate with software/hardware teams for silicon validation of analog IPs • Deliver highly focused and detailed issue reporting, bug tracking and communication of risks and status

• You will work as part of analog project management team and work closely with SoC Integration teams responsible for enabling on-time silicon to meet aggressive product schedules. • Multi-task skills will be key to lead several tasks of project at a time. • Track and drive resolution of technical issues between multi-functional teams including Design, Verification, Validation, Process Technology, Packaging, Quality and Reliability, System Hardware and Application. • Convert data into a clear story to communicate to partners and organizations at all levels. • Pull together regular project status presentations for executive leadership review. • Identify risks, develop mitigation strategies and facilitate conflict resolution. • Collaborate with software/hardware teams for silicon validation of analog IPs • Deliver highly focused and detailed issue reporting, bug tracking and communication of risks and status