轉職熱搜工作

1. 5G modem 架與數位電路設計 2. CLK, 測試, Reset相關設計與規劃 3. 低功耗設計 4. 系統整合 RTL 到 Gate level, 含STA

1. Develop Die-to-die and UCIe digital IP for HPC SOC. 2. Integration of D2D controller and PHY to timing closure and DFT. 3. Define interface specifications, creating comprehensive verification plans, and support integration and physical implementation. 4. Work closely with multiple teams such as mixed mode designers and Firmware engineers.

1. Serdes PMA IP architecture planning 2. Serdes PMA IP RTL coding 3. Serdes PMA IP front-end and back-end integration 4. Co-work with PCS and MAC design team and DV team for IP verification 5. Co-work with Analog design team for PHY co-simulation 6. Co-work with Algorithm team for algorithm implementation and bit-true verification

(請留意：為加快面試安排時間，2026校招僅限定投遞5個職缺)我們在找這樣的你： 資工/資管/電子/電機/電信/通訊/電控相關研究所背景，對行動通訊、無線及寛頻連結、家庭娛樂晶片解決方案有濃厚興趣的2026年應屆畢業生。 勇於表達意見，以團隊成功為目標，面對困難不輕易放棄，總是在想更好的做法，擁有創新及不斷學習的精神。 聯發科技邀請您，與全球最頂尖的菁英一同合作，彼此激盪最新的創意與解法，共同挑戰每一個不可能。

-【工作項目】- 1.教材編輯與開發： *獨立完成新編或修訂教材、周邊產品，具備內容企劃與撰寫能力。 *掌握文字、圖像與版面品質，確保教材內容清晰、正確。 2.編輯流程與送審作業： *熟悉公司與國教院送審流程，擔任負責冊次送審窗口並獨立應對。 *管控進度與品質，完成各階段教材編輯與審查任務。 3.市場回饋與教材優化： *到校蒐集使用意見，能分析內化並提出修訂方向。 *回應審查與市場需求，提出具體修正策略，強化教材競爭力。 4.溝通協調與專業合作： *與作者維持良好互動，協助教材內容整合與調整。 *參與跨部門討論，提供編輯端專業意見，推動專案協作。 -【關於這個職務，我們還想告訴你】- 1. 工作內容橫跨撰寫、編輯、發想與簡報，適合熱愛教育與數學邏輯者一展長才。 2. 經常與作者、美編、企劃溝通協作，培養跨領域整合與表達力。 3. 資深同仁會協助新進人員熟悉流程，團隊氛圍溫暖、互助。 4. 鼓勵提案與創新，只要你願意主動爭取機會，職涯發展將無上限。 5. 福利制度完整：包含子女獎助金、書籍購買補助、升學禮金、活潑的內部社團與活動。 -【關於翰林國小數學團隊】- 我們是一支由主編、組長與編輯夥伴共同組成的教學研發團隊，負責國小數學教材的企劃、撰寫與品質把關。我們相信好的教材源自教學現場的理解與反思，也仰賴團隊的溝通、整合與創意。 在這裡，你將參與： 1. 與作者共創教材，從教案概念到實際內容設計。 2. 親訪教師，傾聽回饋，修正教材使其更貼近教學脈動。 3. 主持送審、校對出版流程，掌握教育政策第一手資訊。 我們重視彼此的信任與支持，也相信專業需要磨練與交流，期待你與我們一起成長。 -【投遞前歡迎先認識我們】- ◆ 翰林人才招募專頁：https://recruit.hle.com.tw/about_us.html ◆ 翰林招募影片：https://www.youtube.com/watch?v=LTrDwH4PRqo ◆ 翰林品牌精神影片1：https://www.youtube.com/watch?v=ClcfZ0iql4U&t=6s ◆ 翰林品牌精神影片2：https://youtu.be/QC59V99NmNA

1. Develop scalable platform clocking architecture for automotive SoC 2. Enhance SoC clock architecture and technology development to address the automotive SoC requirements 3. Drive clock architecture and designs to optimize power, performance, and implementation, including physical design and timing closure

Work in Analog/Mixed-Signal Modeling and Verification Methodology Development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows, and work hands-on with AMS IP Teams for AMS Behavioral Modeling flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with AMS IP teams including digital design, analog design, analog behavioral modeling and design verification members, apply and advance existing and evolving AMS Behavioral Modeling methodologies and processes, and contribute to establish and maintain Modeling Platform to ensure High Quality and High Efficiency of Pre-Si AMS Modeling, Validation and Verification delivery towards high quality silicon products. • Work in methodology development group to establish, streamline and enhance new and existing AMS Behavioral Modeling related development method, coding and validation process and integration flows. • Work with teams to enable deployment of new AMS Behavioral Modeling flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as RF, etc) and integration. • Document on new flows and processes for AMS Behavioral Modeling. • Apply wide range of AMS Behavioral Modeling skills to help and support AMS IP or Chip Teams to establish or enhance new or existing Modeling capabilities, including but not limited to Model Development, Model Validation to ensure Consistency of Behavior with Original Circuit, Integration of Models into various Verification Environment, fixing Modeling issues found in simulation, etc. • Contribute to continuous improving on AMS Behavioral Modeling process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification teams to address new needs or requirement on AMS Behavioral Modeling. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

1. Interpret customers’ functional safety requirements into SoC requirements 2. Define the SoC level architectures to meet functional safety requirements 3. Communicate and coordinate safety designs with cross-function IP teams 4. Perform system safety analysis (ex: FMEDA)

1. Interpret customers’ functional safety requirements 2. Derive functional and technical safety concepts from functional safety requirements 3. Develop and review the safety IP design 4. Communicate and coordinate safety designs with IP teams 5. Perform system safety analysis (ex: FMEDA)