轉職熱搜工作
您正在找數位IC設計工程師的工作,共計356筆職缺在等你,馬上去應徵吧!
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實體設計工程師_ChuPei
面議(經常性薪資達4萬元或以上) 40000元 新竹縣竹北市 2~3年工作經驗1. 從事實體設計化,設計方法開發及簽核工作 2. 執行布局,時序規劃,擺置及繞線,確保時序收斂及實體驗證。 3. 需參與團隊, 合作完成專案。 4. 須具備程式技巧以完成工作。 5. 使用到的工具有: ICC2, Innovus, Formality/LEC, PrimeTime, Calibre 等等。展開 -
MCU/DSP 設計驗證工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1. Processor core, cache and peripheral verification 2. Verification flow and methodology 3. Advanced tool and verification technology survey展開 -
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系統單晶片設計工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 2~3年工作經驗1. Work on 7nm~3nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution展開 -
CPU 實體設計工程師_新竹
面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘Fully accountable with the team to deliver highly competitive ARM based CPU IP. Implementation skill required ranged from RTL, synthesis, DFT, Floorplan, Placement, CTS, Routing, Timing Closure, and physical verification.展開 -
系統單晶片實體設計工程師
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘1. Work on 3~7nm design implementation, methodology, and sign-off 2. Perform synthesis, DFT, floorplan, clock planning, place and route, timing closure, ECO, IR signoff, and physical verification 3. Manage schedule, resolve design and flow issues, drive methodologies and execution展開 -
<Data center>資深D2D高速介面設計工程師
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 4~5年工作經驗1. Develop Die-to-die and UCIe digital IP for HPC SOC. 2. Integration of D2D controller and PHY to timing closure and DFT. 3. Define interface specifications, creating comprehensive verification plans, and support integration and physical implementation. 4. Work closely with multiple teams such as mixed mode designers and Firmware engineers.展開 -
RF IC design engineer
面議(經常性薪資達4萬元或以上) 40000元 新竹市東區 工作經歷不拘The candidate will design, supervise layout, help characterize transceiver front-end circuits for WiFi and Bluetooth production.展開 -
SoC Debug IC Designer
面議(經常性薪資達4萬元或以上) 40000元 台北市內湖區 工作經歷不拘1. Design and RTL implementation of SoC debug modules 2. Integration and verification of debug components (e.g., trace, monitor, access port) 3. Debug signal capture, trace, and analysis for SoC platforms 4. Support SoC debug flow and issue localization 5. Collaborate with cross-functional teams to optimize debug performance 6. Documentation and test specification for SoC debug features 7. Location: Taipei/Hsinchu展開 -
<Automotive> Multimedia Digital IC Design Engineer
面議(經常性薪資達4萬元或以上) 新竹市東區 工作經歷不拘1.數位電路設計 2.多媒體架構與電路設計 3.多媒體系統整合 1.Digital IC Design 2.Multimedia Architecture and Design 3.Multimedia System Integration展開
