轉職熱搜工作

IC 測試開發工程師 負責高速數位、類比晶片測試程式開發(AP/compu AI/ASIC/…)，產品特性異常分析與改善 新產品導入量產與生產良率測試時間優化 俱獨立帶產品作業為佳。

- 架構與規格設計： 定義與設計射頻積體電路 (RFIC) 系統架構，並制定先進通訊解決方案的詳細技術規格。 - 校準與控制開發： 開發並驗證射頻校準演算法與射頻系統控制流程，以優化收發器在各種環境下的效能表現。 - 通訊系統與數位訊號處理： 設計無線通訊系統，並針對射頻性能優化與非理想特性補償，開發專用的數位訊號處理 (DSP) 演算法。 - Architecture & Specification: Define and design RFIC system architectures and detailed technical specifications for advanced connectivity solutions. - Calibration & Control: Develop and verify RF calibration algorithms and RF system control flows to optimize transceiver performance across various conditions. - Communication System & DSP: Design wireless communication systems and implement digital signal processing (DSP) algorithms specifically tailored for RF performance enhancement and impairment compensation.

The candidate will design, supervise layout, help characterize transceiver front-end circuits for WiFi and Bluetooth production.

1. 智慧型手機系統記憶體與儲存: DRAM (LPDDR4, LPDDR5, LPDDR6...) / Storage (UFS, eMMC...)驗証 2. 系統驗証方法研究與開發 3. 規畫驗証計畫 (test plan, test case) 4. 自動化測試環境開發

• 負責高速SerDes的開發，包括韌體設計與演算法實現、IC功能驗證、系統效能優化以及客戶支援（熟悉架構、韌體、除錯、優化及測試相關工作） • 開發自動化驗證（使用C++、Python、C#和MATLAB） • 與類比/數位團隊合作，從原型設計到量產共同開發晶片 •協助客戶設計導入並支援量產

1. 參與CPU IP電路設計弱點之檢視與審查。 2. 開發 CPU IP 電路穩定度之測試項目，以排查/篩選出電路弱點。 3. 制定 CPU 電源完整性與電源量產品質方法

1. Serdes IP設計開發, IC功能驗證與系統效能改善, e.g. 50G/100G/200G/300G/400G. 2. 與類比/數位/演算法團隊合作共同開發晶片從雛型設計到量產 3. 負責實作演算法或韌體設計,並在設計階段協助開發團隊建立模擬模型來增加驗證涵蓋率 4. 設計自動化驗證高速介面並除錯, 並支持IP導入產品與客戶應用

1. Package related structure stress analysis including warpage, material study. 2. Package and board level stress modeling for TCT, drop and vibration. 3. IC and package thermal analysis, modeling and characterization 4. Chip-Package-PCB thermal co-simulation and design. 5. System level thermal simulation 6. System level stress simulation

28nm及以下先進製程(含FinFET) IO電路和ESD防護設計, 工作內容包含 (1) GPIO電路設計(包含ESD/LU防護) (2) 特殊應用IO (SD3.0/SIM card/eMMC等)電路設計(包含ESD/L防護) (3) 高速IO和特殊應用IO在事業部專案上展開和執行 - Advance node (28nm and beyond, including FetFET) IO circuitry and ESD protection design covering fields for (a) General purpose IO circuit design (with ESD/LU protection) (b) Specialty IO (SD3.0/SIM card/eMMC etc.) circuit design (with ESD/LU protection) (c) Project related implementation for high speed/specialty IO Interface - High speed IO, specialty IO circuit design, ESD protection circuit design and simulation. Work with project leader, layout, packaging and system engineers to meet design and system specifications. Work with IO library modeling, characterization teams closely for IP release.

1. Package design and planning of various product. 2. Design & layout of BGA substrate. 3. Co-work with package houses for package design 4. Development of advanced package technology. 5. Package design platform development.