轉職熱搜工作

1.教導幼兒良好的基本生活習慣和孩童生活事項處理，並保護其安全 2.與同儕共同設計安排幼兒統整性課程活動(語文、美感、認知、社會、情緒、身體動作與健康) 3.校內生活環境管理(包含校內環境佈置…)、活動執行及機動支援 4.與父母、保育員協同共同討論幼童的行為表現與學習情形

1. 使用 AutoCAD 繪製空調、給排水及電力配管施工圖，並根據設計需求進行細部設計 2. 熟悉且熟練操作 Revit 軟體進行建築結構及機電系統相關繪圖 3. 解讀工程圖紙與相關技術規範，確保繪圖符合工程設計標準及規範要求 4. 依據現場施作需求檢查圖面與施工的一致性，修正並更新相關圖面 5. 熟悉空調及水機電系統相關法規，協助確保管線配置符合安全要求 6. 協助基本文書處理工作，包括資料整理與報表製作，支援部門行政事務 7. 具備空調、給排水、電力系統基礎知識，可與設計單位及施工團隊溝通協調 歡迎有學習熱忱與專業技能的您，立即投遞履歷加入我們，一同成就工程繪圖的卓越表現！

1.廠務系統運轉管理(電力,空調,水,消防,IT機房,中央監控等) 2.廠務系統緊急應變處置 3.廠務系統節能減費持續改善 4.因應整改需求之廠務系統規劃,設計,執行 5.員工在廠務相關方面需求之溝通與滿足 6.新建辦公棟機電工程施工進度管理

Multi-RAT (6G/5G/4G/3G/2G) modem development. This is a common job description. You may involve at least one or more topics in the following: (1) architecture planning 1.1 Modem/SoC TOP system architecture 1.2 Modem/SoC CPU system design 1.3 Modem/SoC DSP system design 1.4 Modem/SoC BUS system design (2) digital circuit design and verification 2.1 baseband modules 2.2 digital front-end modules 2.3 RF/mixed-mode digital control modules 2.4 Computer/network system modules 2.5 High speed interface design (3) IP integration 3.1 Clock/reset, test modeand low power mode design 3.2 floorplan and synthesis development (4) Design methodology 4.1 design flow enhancement (low power/verification/etc) 4.2 chip MP quality control flow

參與 5G/6G New Radio 行動通訊數位基頻 IC 與 IP 開發. 包括multi-RATs (2/3/4/5/6G) modem的架構設計, RTL 設計, 整合和驗證.

1. Lead or support SoC architecture design, modeling, and technical feasibility studies across specific domains, including cellular modem, connectivity (Wi-Fi/Bluetooth/GNSS/UWB), performance, and power. 2. Lead or support SoC architecture development for smartphone, thin-modem, CPE/telematics, and gateway products, focusing on system performance and power considerations based on product requirements. 3. Lead or support technical feasibility studies of product requirements and collaborate with domain architects and product marketing teams to develop competitive product specifications.

1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project 4.Develop HW emulator/FPGA platform to accelerate design verification task 5.Co-work with SW/HW engineering to valid function and shift-left SW develop 6.Debug and root cause failure with SW/HW engineering in both pre-silicon and post-silicon

1.RTL platform design integration (clock/reset/power/bus design and architecture, MBIST, etc.) - use for FPGA and Emulator should also be considered 2.Integration quality check (RTL/SDC/Power spec signoff check)

1. 4/5/6G modem Hardware platform IP and Subsys digital design and PPA optimization 2. Define hardware architecture of a digital IP/system: Include Clock, Bus (AXI/APB/NOC/…), Async design, high speed IF, new IP for sub-sys design topic 3. Subsys integration from RTL to gate level including timing closure and testability 4. Design methodology and integration flow improvement

1. WiFi/BT/UWB 公板設計及驗證 2. PCB 公版設計, 除錯, 驗證 3. FCC/CE/TELEC EMI 防治對策 4. 支持客戶應用及量產導入