轉職熱搜工作

1. 設計 5G/B5G 和新一代多模通訊協定架構，開發具有超高數據速率，低延遲和出色用戶體驗的通訊協定軟體，以廣泛運用在手機、人工智慧物聯網和車用系統上 2. 與全球領先網路設備商 (如: 華為、中興、愛立信、諾基亞) 進行互操作開發測試，以早期達成產品相容性目標 3. 開發領先全球的網路運營商功能，與世界頂尖客戶合作，實現新一代出色的移動通訊產品

1. Work for Protocol verification in System Verification, to communicate with teams and co-work with modem R&D in multiple-sites in the world 2. Drive Inter-operability test Projects, for Planning, Preparation and Test execution in Japan operators Lab and Field Test. 3. Analysis and report modem protocol related issues, to collaborate with team members in System Verification and modem R&D. 4. Track modem related issues and contribute the fast correction delivery. 5. Provide technical support, to lead prompt solution to internal/external customers

1. DFT architecture exploration & evaluation for next-gen process node & package technology of MediaTek: * Scan chain insertion & ATPG pattern generation * Pattern validation through simulation & silicon analysis(pass/fail, shmoo, fail log, etc.) * Diagnosis to help manufacture process improvement 2. Co-work with SoC architect, RTL designer, physical design engineer, and package engineer to define best architecture for 3D-IC: * PPA(Performance/Power/Area) impact analysis & mitigation via DFT innovation * Develop & integrate DFT-related RTL design modules to test chip

1. 系統單晶片DFT架構規劃與設計 2. 負責與客戶討論DFT架構，並開發對應的DFT流程 3. Scan/DFT電路設計timing收斂 4. DRC偵錯與DFT設計模擬 5. 測試涵蓋率的改善 6. ATPG pattern產生，偵錯，與量產管理

• Leading Bluetooth protocol stack software development • Leading customer requirement implement and support

1. 負責建立與改善軟體開發流程相關的資訊系統及自動化機制 2. 負責建置與維護〝持續整合(CI)〝、〝持續交付(CD)〝相關資訊系統與服務 3．新技術或軟體開發方法調研與導入，例如: AI, RPA等

We are heavily recruiting talents and professionals in DV, EDA, and AI/ML fields to join our force to conquer new heights in chip complexity! As one of the world’s top IC design companies, MediaTek is constantly pushing the capabilities of chips to the limits. Our newest SoCs and ASICs are wildly sophisticated, packed with industry-leading technologies built by thousands of chip designers. With great design power comes great verification responsibilities. Our team, as a part of the verification force, has put major efforts into creating innovative and robust strategies to fulfill these responsibilities. To ensure high design quality for first silicon success, we have implemented a complete suite of functional and low-power test plans and benches across all design scopes, from IPs to SoC integrations. Furthermore, we have been collaborating with EDA tool providers and academic institutions on leveraging new verification technologies, including emulation, AI tuning, and formal methods, many of which have improved the traditional workflows by orders of magnitude. We also keep challenging ourselves to develop in-house verification tools and platforms to accelerate test regressions and track verification progress more efficiently. All these efforts ultimately lead to our success in delivering high-quality chips over the years.

Work on security technologies such as trustzone, virtualization, secure boot cryptography, key management, physical defense and more. Participate in owning the embedded security software architecture used by our products. Bridge the gap between hardware and software architecture definition by defining software interfaces for security HW IPs, defining strategy for petitioning use cases and mapping those parts to various security HW IPs and defining, tracking and optimizing for relevant system. Work with cross-functional teams to ensure architected features are successfully deployed in product. Ensure that the defined solutions integrate well with the operational logistics of HW IPs spec, test, bringup and SW development flows.