轉職熱搜工作

Work in Analog/Mixed-Signal Design Verification Methodology Development group to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows, and work hands-on with AMS IP Teams for AMS DV flow and process experiments, demonstrations, adaptions, and deployment. The candidate will work with digital design, analog design, analog behavioral modeling and design verification teams, apply and advance existing and evolving Digital and AMS Verification methodologies and processes, and contribute to establish and maintain Verification Platform to ensure High Quality and High Efficiency of Pre-Si Verification Delivery towards high quality silicon products. • Work in methodology development team to establish, streamline and enhance new and existing AMS DV related development method, coding process and integration flows. • Work with teams to enable deployment of new flow and processes through experiments, demonstrations, adaptions (for real projects in specified areas such as SERDES, etc) and integration. • Document on new flows and processes for AMS DV. • Apply wide range of Digital and/or AMS DV skills to help and support AMS IP or Chip DV Teams to establish or enhance new or existing DV capabilities, including but not limited to developing scalable and portable Test bench, test cases, drivers, checkers, assertions and reference models, and running RTL and Gate Level simulations and reaching all coverage closures. • Contribute to continuous improving on AMS DV process for better quality and efficiency through methodology and process improvements. • Communicate and collaborate with global architecture, design, verification, and post-Silicon testing teams to address new needs or requirement on DV Support. Job Locations: • Taiwan:Hsinchu/Taipei • India: Bangalore • Singapore • USA:Santa Clara, CA/San Diego, CA

1. Develop systematic algorithms to alleviate design challenges, including implementation, process what-if assessment, system performance evaluation, in advanced nodes or package 2. Closely work with foundry and EDA vendors to define innovative HPC, Chiplet design methodologies 3. Explore new EDA features and define improvement direction from MTK product requirements

1.Propose design verification plan and do the execution based on IP and system HW architecture/application 2.Develop design verification environment 3.Develop required verification methodology and adopt into project

SoC Power/IR/PI 專家，可以處理與 IR 相關的主題和問題，例如專案執行過程中 IR drop 發生原因、熱點解決以及改進 IR 分析和預防流程。 同時具備SoC，封裝，及系統版電源分析知識

1. 開發emulation/prototyping 相關的技術及使用流程 2. 建立CPU/GPU emulation/prototyping 驗證平台 3. 協助project team導入emulation/prototyping 技術 4. emulation/prototyping 使用及工具問題的支持 5. 管理 emulator 及prototyping 硬體與使用分配

CPU Physical design, - floorplanning, - timing closure - Physical verficiation - DFT

1. CPU功耗分析 (設計 vs. 量測), 確保CPU功耗體質 2. CPU最大電流分析 (設計 vs. 量測), 驗證過電流保護機制確保系統穩定性 3. PMIC+PDN+CPU 功耗效率優化 1. CPU power pre-silicon vs. post-silicon correlation. Ensure CPU power quality 2. CPU max. current pre-silicon vs. post-silicon correlation. Validate max. current protection technique for system stability 3. PMIC+PDN+CPU power efficient optimization

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory. Furthermore, through collaboration with worldwide colleagues, you will have the rare opportunity to apply advanced Deep Learning theories to novel application areas such as AI-designed IC and General Intelligence Conversation. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

In a flexible and supportive environment, one of your major responsibilities is to push the state of the art of learning theory, to obtain insights beyond mythical theories as well as to apply the right solution to novel application areas such as AI-designed IC and General Intelligence Conversation. Furthermore, you shall actively engage with worldwide colleagues and academics to nurture and build a collaborative and effective R&D environment. We welcome all ML/DL backgrounds, including computer vision, speech and NLP, and robotics.

1. 應用正規方法在硬體或軟體的驗證上 2. 正規方法文獻回顧與論文分析以改善目前的使用限制 3. 規劃安排跨部門的技術教學與討論課程 4. 相關的文件撰寫與審查修改