轉職熱搜工作

Multi-RAT (6G/5G/4G/3G/2G) modem development. This is a common job description. You may involve at least one or more topics in the following: (1) architecture planning 1.1 Modem/SoC TOP system architecture 1.2 Modem/SoC CPU system design 1.3 Modem/SoC DSP system design 1.4 Modem/SoC BUS system design (2) digital circuit design and verification 2.1 baseband modules 2.2 digital front-end modules 2.3 RF/mixed-mode digital control modules 2.4 Computer/network system modules 2.5 High speed interface design (3) IP integration 3.1 Clock/reset, test modeand low power mode design 3.2 floorplan and synthesis development (4) Design methodology 4.1 design flow enhancement (low power/verification/etc) 4.2 chip MP quality control flow

參與 5G/6G New Radio 行動通訊數位基頻 IC 與 IP 開發. 包括multi-RATs (2/3/4/5/6G) modem的架構設計, RTL 設計, 整合和驗證.

1.RTL platform design integration (clock/reset/power/bus design and architecture, MBIST, etc.) - use for FPGA and Emulator should also be considered 2.Integration quality check (RTL/SDC/Power spec signoff check)

1. Lead or support SoC architecture design, modeling, and technical feasibility studies across specific domains, including cellular modem, connectivity (Wi-Fi/Bluetooth/GNSS/UWB), performance, and power. 2. Lead or support SoC architecture development for smartphone, thin-modem, CPE/telematics, and gateway products, focusing on system performance and power considerations based on product requirements. 3. Lead or support technical feasibility studies of product requirements and collaborate with domain architects and product marketing teams to develop competitive product specifications.

1. 4/5/6G modem Hardware platform IP and Subsys digital design and PPA optimization 2. Define hardware architecture of a digital IP/system: Include Clock, Bus (AXI/APB/NOC/…), Async design, high speed IF, new IP for sub-sys design topic 3. Subsys integration from RTL to gate level including timing closure and testability 4. Design methodology and integration flow improvement

1. 客戶系統品質前期品質規格討論確認與量產品質持續改善 2. 客戶系統穩定性異常退貨分析與溝通 3. 協助客戶生產品質改善 4. 推動內部品質系統流程精進

我們正在尋找一位具備先進製程元件特性量測與 SPICE 元件模型經驗豐富的工程師。 * 驗證 SPICE 模型並追蹤來自晶圓廠的模擬與實測 (S2S) 一致性 * 執行廣泛的元件特性量測與分析，以利製程與元件評估及基準比較 * 建立符合內部需求的客製化內部模型 * 為設計人員提供元件與 SPICE 模型相關的諮詢與指導方針

1.開發嵌入式硬體驅動程式及驗證硬體設計 2.維護及開發硬體信任根功能, 包含簽名校驗, 密鑰管理, 版本回滾保護,度量啟動, 權限存取管控 3.整合新產品規格功能

• Lead the full lifecycle of office construction and facility development projects, from planning and design through procurement, execution, commissioning, and handover. • Manage multiple construction packages, including: o Office design and space planning o Interior fit-out and renovation works o Mechanical, Electrical, and Plumbing (MEP) systems o Fire protection, low-voltage, and other building infrastructure projects • Develop project execution strategies, schedules, budgets, and risk mitigation plans. • Oversee design consultants, contractors, suppliers, and internal stakeholders to ensure projects are delivered on time, within budget, and to quality standards. • Drive tendering and sourcing activities, including RFI, RFQ, RFP, bid evaluation, contract negotiation, and award processes. • Leverage knowledge of public works and tendering procedures to ensure regulatory compliance and effective project delivery. • Identify, evaluate, and onboard new suppliers and contractors to expand and strengthen the supplier base. • Manage project budgets, cost controls, change orders, claims, and contract administration. • Monitor project progress, safety, quality, and compliance requirements throughout execution. • Provide regular project updates and recommendations to senior management. 1. 負責辦公室及相關設施建設專案之全生命週期管理，包括規劃、設計、招標、施工、驗收及移交作業。 2. 主導各項工程標案及施工包管理，包括但不限於： o 辦公空間設計（Design Package） o 室內裝修工程（Fit-out / Renovation Package） o 機電工程（MEP Package） o 弱電系統、消防及相關配套工程 1. 熟悉公共工程相關法規、招標程序及履約管理機制，能獨立規劃並推動標案執行。 2. 與內部使用單位、設計顧問、施工廠商及外部利害關係人協調，確保專案依品質、成本及時程要求完成。 3. 建立並管理工程預算、成本估算及專案風險控管機制。 4. 負責工程供應商及承包商開發與管理，持續拓展及建立優質供應商資源。 5. 制訂招標策略，執行RFI、RFQ、RFP、競標及議價等採購活動，以確保最佳商業條件及供應品質。 6. 監督工程進度、品質、安全及合規要求，並定期向管理階層彙報專案執行情況。 7. 處理工程變更管理、合約管理及履約爭議等相關事宜。 8. 持續優化工程建設及採購流程，提高專案執行效率與成本效益。

1. 4/5/6G modem hardware architecture and digital circuit design task 2. Define hardware architecture of a digital IP/system 3. Include Clock, Bus (AXI/APB/NOC/…), Async design, high speed IF, new IP for sub-sys design topic 4. IP and Subsys digital design and PPA optimization 5. Subsys integration from RTL to gate level including timing closure and testability 6. Design methodology and integration flow improvement