轉職熱搜工作

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. RD Integration starts with the definitions, including transistor architecture and design building blocks, of a new technology node. Then, a manufacturable process flow is developed for evaluations and further improvements. The tasks may involve multidiscipline technical knowledge bases and project management skills. The job will require a lot of collaborations, so frequent communication should be expected. Test structure are designed in order to evaluate the manufacturing processes. Test vehicles will be built, and real chips will be validated through yield, performance, and reliability learning cycles. The goal is to deliver an optimized semiconductor technology that will meet the required chip performance, power, area-per-function, costs, and time-to-market (PPACt) for our customers. Responsibilities: 1. Development of world-class cutting-edge technology, and responsible for the success of the A10/A14 technology: (1) Process integration across process modules, including test key design, tape out, device analysis, simulation, model, and robust. (2) Test key designs for design rule validation, electrical modeling, and yield learning. (3) Characterization of state-of-the-art devices, spice targets‘ setting for modelling, occasional bench measurement. (4) Lot handling: periodically serves as on-duty engineer to coordinate device lots‘ handling. 2. Advanced process integration development: integration and baseline sustaining to meet process KPIs on performance/ yield/ reliability/ manufacturability in A10/A14 program. 3. Advanced integration baseline process transfer to volume production. 4. Data analysis to identify the issue and issue owner. 5. Co-work with various teams to evaluate new processes and solve the issue. 6. Routine integration logistic job.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5354&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. We invite you to become an integral part of our forward-thinking team, where you will be at the vanguard of nanosheet transistor device design for our prestigious A14 technology initiative. This role offers a unique opportunity to work on the frontier of semiconductor innovation, collaborating with industry leaders and contributing to technologies that define the next generation of electronics. Responsibilities: 1. Pioneering Nanotechnology Development: (1) Seamless Integration: Integrate devices across various process modules, including the creation of test keys, execution of tape-outs, meticulous device analysis, advanced simulations, and fortification of model integrity. (2) Innovative Design: Craft precision test key designs to facilitate accurate electrical modeling and comprehensive device characterization. (3) Advanced Characterization: Define the parameters of technological progress by characterizing state-of-the-art devices, establishing SPICE modeling targets, and conducting occasional bench measurements. (4) Experimentation: Design experiments to meet device KPIs for performance and periodically serve as the on-duty engineer to coordinate device process management. 2. Diagnostic Analysis: Critical Data Assessment: Apply your analytical expertise to dissect transistor electrical and physical data, pinpointing issues and identifying responsible parties for targeted resolution. 3. Collaborative Problem-Solving: Interdisciplinary Teamwork: Join forces with a spectrum of specialized teams to scrutinize and appraise new processes, driving the resolution of complex challenges through collective insight and expertise.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5351&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Embark on a career journey with us, where innovation meets impact. We are searching for a dedicated professional to join our elite team, harnessing the world‘s most sophisticated technology to engineer SRAM that impacts the lives of millions globally. Responsibilities: 1. Spearhead A14 SRAM Development: (1)Yield and Device Optimization: Apply your analytical prowess to enhance SRAM/Device performance and ensuring excellent yield. (2)SRAM Cell Design and Testing: Craft cutting-edge SRAM cells and conduct critical process window evaluations to guarantee optimal design resilience. (3)SRAM Characterization and Validation: Utilize advanced simulation tools to characterize and validate SRAM, paving the way for silicon success. 2. Collaborative Excellence: Cross-Functional Teamwork: Engage with a network of experts across various specialties, including Integration, Design, Product, and Reliability, to fortify SRAM cell robustness. 3. Identify issues and build up methodology, propose solutions and evaluation plans.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=5353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Aspire to be a part of a visionary team that develops world-class, cutting-edge technology for the A14 platform? This is a call to those who wish to delve into the realm of interconnect and chip/package (2D/3D) co-optimization, where your work will be integral to our success. Responsibilities: 1. Championing Technological Excellence: (1) Optimization Wizardry: Ensure the A14 program excels by harmonizing process requirements across performance, yield, reliability, and manufacturability through strategic process integration and baseline maintenance. (2) Design & Validation Expertise: Lead the tape-out process and rigorously test key designs to validate design rules, refine electrical modeling, and elevate yield outcomes. (3) Benchmarks & Characterization: Analyze and characterize the electrical performance relative to the process, establish SPICE modeling benchmarks, and perform selective bench measurements to guarantee precision and quality. 2. Collaborative Innovation: (1) Analytical Problem-Solving: Bring your innovative mindset to team efforts, using data analysis to uncover process issues and co-developing new processes as solutions alongside talented peers. (2) Process Evolution: Play a pivotal role in evolving processes from advanced integration baselines to full-scale volume production, ensuring a smooth transition and exemplary results.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=532&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: Front-end to back-end large scale digital circuit design for system-on-chips and 3DICs, responsible for designing with the state-of-the-art process technologies and developing corresponding CAD flows that explores cutting edge design methodologies and latest EDA tools, either for internal first-in-the-industry testchips or leading customer’s products

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=4588&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Develop and implement test methodologies for HBM packages 2. Design and develop test hardware and software 3. Collaborate with design and product teams to ensure package designs meet specifications 4. Develop and execute test plans to validate package designs 5. Analyze test data and provide feedback to design and product teams 6. Develop and maintain test documentation and procedures 7. Participate in cross-functional teams to resolve issues and improve processes 8. Stay up-to-date with industry standards and trends

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=548&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Network management. 2. Firewall management. 3. Security product(e.g., WAF, Firewall, Proxy, SLB, Antivirus) and Linux management. 4. Data center management. 5. Backup system management. 6. Project management and architecture design. 7. Continuously improvement on the each jobs. 8. IT new technology survey and recommendation.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16040&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Responsibilities: 1. Act as the FAC Cyber Security Engineer to analyze security risks associated with the facility network environment and develop strategies to mitigate those risks. 2. Identify and solve FAC’s IT/OT security problems in a timely and effective manner. 3. Perform FAC digital transformation’s related tasks.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=16023&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Packaging‘s mission is to provide the best heterogeneous integration technology (HIT) that realizes system expansion and performance improvement, and to influence the development of the industrial ecosystem by achieving innovation together with our partners as the leading advanced packaging solution provider. Responsibilities: 1. Advanced panel level packaging development for CoPoS technology. 2. Exploratory panel level packaging process/material/tool development for new applications. 3. Process stability/manufacturability improvement for yield and reliability qualification. 4. Responsible for transferring the process/material/tool for mass production.

【本職缺僅接受台積電官方網站投遞】 請至台積電官方網站投遞個人履歷表，此職缺履歷登錄網址: https://careers.tsmc.com/careers/JobDetail?jobId=15353&source=1111 Established in 1987 and headquartered in Taiwan, TSMC pioneered the pure-play foundry business model with an exclusive focus on manufacturing its customers’ products. In 2023, the company served 528 customers with 11,895 products for high performance computing, smartphones, IoT, automotive, and consumer electronics, and is the world’s largest provider of logic ICs with annual capacity of 16 million 12-inch equivalent wafers. TSMC operates fabs in Taiwan as well as manufacturing subsidiaries in Washington State, Japan and China, and its ESMC subsidiary plans to begin construction on a fab in Germany in 2024. In Arizona, TSMC is building three fabs, with the first starting 4nm production in 2025, the second by 2028, and the third by the end of the decade. Advanced Packaging‘s mission is to provide the best heterogeneous integration technology (HIT) that realizes system expansion and performance improvement, and to influence the development of the industrial ecosystem by achieving innovation together with our partners as the leading advanced packaging solution provider. Responsibilities: Act as first line guardian of TSMC world class chip manufacturing process. Ensure the stable quality of wafers output by monitoring and adjusting process parameters to enhance machine efficiency. 1. Develop and maintain baselines, including setting up recipes. (1) Improve the stability and accuracy of metrology recipes to enhance yield and reliability qualifications. (2) Responsible for transferring metrology solutions to volume manufacturing. 2. Employ cutting-edge technology to 3DIC metrology, including SoIC, CoWoS, InFO, and Panel. (1) Leverage your analytical abilities to improve metrology performance, guaranteeing high yield and device efficiency. (2) Identify challenges, formulate methodologies, propose solutions, and new metrology evaluation plans.